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gpu: nvgpu: Remove falcon header usage in nvlink

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For nvlink, we need to use minion registers instead of
generic falcon registers.

JIRA NVGPU-966

Change-Id: I850d2e2a4475394c37d2253c5034713c78439bd0
Signed-off-by: Tejal Kudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1795086
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Tejal Kudav
2018-08-08 16:36:10 +05:30
committed by mobile promotions
parent e988951cca
commit 2b2b4f9b14
2 changed files with 17 additions and 2 deletions
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3
drivers/gpu/nvgpu/gv100/nvlink_gv100.c
View File

@@ -34,7 +34,6 @@
#include "gk20a/gk20a.h"
#include "nvlink_gv100.h"
#include <nvgpu/hw/gv100/hw_falcon_gv100.h>
#include <nvgpu/hw/gv100/hw_top_gv100.h>
#include <nvgpu/hw/gv100/hw_nvlinkip_discovery_gv100.h>
#include <nvgpu/hw/gv100/hw_nvlipt_gv100.h>
@@ -329,7 +328,7 @@ static bool gv100_nvlink_minion_falcon_isr(struct gk20a *g)
if (!intr)
return true;
if (intr & falcon_falcon_irqstat_exterr_true_f()) {
if (intr & minion_falcon_irqstat_exterr_true_f()) {
nvgpu_err(g, "FALCON EXT ADDR: 0x%x 0x%x 0x%x",
MINION_REG_RD32(g, 0x244),
MINION_REG_RD32(g, 0x248),

16
drivers/gpu/nvgpu/include/nvgpu/hw/gv100/hw_minion_gv100.h
View File

@@ -104,6 +104,22 @@ static inline u32 minion_falcon_irqstat_halt_v(u32 r)
{
return (r >> 4U) & 0x1U;
}
static inline u32 minion_falcon_irqstat_exterr_f(u32 v)
{
return (v & 0x1U) << 5U;
}
static inline u32 minion_falcon_irqstat_exterr_v(u32 r)
{
return (r >> 5U) & 0x1U;
}
static inline u32 minion_falcon_irqstat_exterr_true_v(void)
{
return 0x00000001U;
}
static inline u32 minion_falcon_irqstat_exterr_true_f(void)
{
return 0x20U;
}
static inline u32 minion_falcon_irqmask_r(void)
{
return 0x00000018U;