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git://nv-tegra.nvidia.com/linux-nvgpu.git
synced 2025-12-23 09:57:08 +03:00
gpu: nvgpu: Add class numbers to characteristics
Some kernel APIs rely on user space knowing class numbers. Allow querying the numbers from kernel. Bug 1567274 Change-Id: Idec2fe8ee983ee74bcbf9dfc98f71bbcc1492cfb Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/594402
This commit is contained in:
committed by
Dan Willemsen
parent
88c760b2ea
commit
2c23d1066f
@@ -700,7 +700,8 @@ enum {
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FERMI_TWOD_A = 0x902D,
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KEPLER_COMPUTE_A = 0xA0C0,
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KEPLER_INLINE_TO_MEMORY_A = 0xA040,
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KEPLER_DMA_COPY_A = 0xA0B5, /*not sure about this one*/
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KEPLER_DMA_COPY_A = 0xA0B5,
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KEPLER_CHANNEL_GPFIFO_C = 0xA26F,
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};
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static inline int support_gk20a_pmu(struct platform_device *dev)
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@@ -27,16 +27,16 @@ int gpu_init_hal(struct gk20a *g)
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switch (ver) {
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case GK20A_GPUID_GK20A:
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gk20a_dbg_info("gk20a detected");
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gk20a_init_hal(&g->ops);
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gk20a_init_hal(g);
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break;
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case GK20A_GPUID_GM20B:
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gk20a_dbg_info("gm20b detected");
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if (gm20b_init_hal(&g->ops))
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if (gm20b_init_hal(g))
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return -ENODEV;
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break;
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#if defined(CONFIG_ARCH_TEGRA_18x_SOC)
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case TEGRA_18x_GPUID:
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if (TEGRA_18x_GPUID_HAL(&g->ops))
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if (TEGRA_18x_GPUID_HAL(g))
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return -ENODEV;
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break;
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#endif
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@@ -45,8 +45,11 @@ static struct gpu_ops gk20a_ops = {
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}
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};
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int gk20a_init_hal(struct gpu_ops *gops)
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int gk20a_init_hal(struct gk20a *g)
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{
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struct gpu_ops *gops = &g->ops;
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struct nvgpu_gpu_characteristics *c = &g->gpu_characteristics;
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*gops = gk20a_ops;
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gops->privsecurity = 0;
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gk20a_init_mc(gops);
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@@ -61,5 +64,12 @@ int gk20a_init_hal(struct gpu_ops *gops)
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gk20a_init_regops(gops);
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gops->name = "gk20a";
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c->twod_class = FERMI_TWOD_A;
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c->threed_class = KEPLER_C;
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c->compute_class = KEPLER_COMPUTE_A;
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c->gpfifo_class = KEPLER_CHANNEL_GPFIFO_C;
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c->inline_to_memory_class = KEPLER_INLINE_TO_MEMORY_A;
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c->dma_copy_class = KEPLER_DMA_COPY_A;
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return 0;
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}
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@@ -20,9 +20,8 @@
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#include <linux/kernel.h>
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struct gpu_ops;
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struct gk20a;
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int gk20a_init_hal(struct gpu_ops *gops);
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int gk20a_init_hal(struct gk20a *g);
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#endif /* __HAL_GK20A__ */
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@@ -15,7 +15,7 @@
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#ifndef LTC_GK20A_H
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#define LTC_GK20A_H
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struct gk20a;
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struct gpu_ops;
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void gk20a_init_ltc(struct gpu_ops *gops);
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#endif
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@@ -20,7 +20,9 @@ struct gk20a;
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enum {
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MAXWELL_B = 0xB197,
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MAXWELL_COMPUTE_B = 0xB1C0,
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KEPLER_INLINE_TO_MEMORY_B= 0xA140,
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MAXWELL_DMA_COPY_A = 0xB0B5,
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MAXWELL_CHANNEL_GPFIFO_A= 0xB06F,
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};
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#define NVB197_SET_ALPHA_CIRCULAR_BUFFER_SIZE 0x02dc
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@@ -83,8 +83,11 @@ static struct gpu_ops gm20b_ops = {
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}
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};
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int gm20b_init_hal(struct gpu_ops *gops)
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int gm20b_init_hal(struct gk20a *g)
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{
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struct gpu_ops *gops = &g->ops;
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struct nvgpu_gpu_characteristics *c = &g->gpu_characteristics;
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*gops = gm20b_ops;
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#ifdef CONFIG_TEGRA_ACR
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if (tegra_platform_is_linsim()) {
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@@ -127,5 +130,12 @@ int gm20b_init_hal(struct gpu_ops *gops)
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gm20b_init_regops(gops);
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gops->name = "gm20b";
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c->twod_class = FERMI_TWOD_A;
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c->threed_class = MAXWELL_B;
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c->compute_class = MAXWELL_COMPUTE_B;
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c->gpfifo_class = MAXWELL_CHANNEL_GPFIFO_A;
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c->inline_to_memory_class = KEPLER_INLINE_TO_MEMORY_B;
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c->dma_copy_class = MAXWELL_DMA_COPY_A;
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return 0;
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}
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@@ -15,7 +15,7 @@
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#ifndef _NVHOST_HAL_GM20B_H
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#define _NVHOST_HAL_GM20B_H
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struct gpu_ops;
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struct gk20a;
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int gm20b_init_hal(struct gpu_ops *gops);
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int gm20b_init_hal(struct gk20a *g);
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#endif
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@@ -242,7 +242,7 @@ static int vgpu_init_hal(struct gk20a *g)
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case GK20A_GPUID_GK20A:
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gk20a_dbg_info("gk20a detected");
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/* init gk20a ops then override with virt extensions */
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gk20a_init_hal(&g->ops);
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gk20a_init_hal(g);
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vgpu_init_fifo_ops(&g->ops);
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vgpu_init_gr_ops(&g->ops);
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vgpu_init_ltc_ops(&g->ops);
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@@ -122,6 +122,13 @@ struct nvgpu_gpu_characteristics {
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__u64 flags;
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__u32 twod_class;
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__u32 threed_class;
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__u32 compute_class;
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__u32 gpfifo_class;
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__u32 inline_to_memory_class;
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__u32 dma_copy_class;
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/* Notes:
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- This struct can be safely appended with new fields. However, always
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keep the structure size multiple of 8 and make sure that the binary
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