diff --git a/drivers/gpu/nvgpu/common/gr/gr_intr.c b/drivers/gpu/nvgpu/common/gr/gr_intr.c
index 3cab8df44..987e10334 100644
--- a/drivers/gpu/nvgpu/common/gr/gr_intr.c
+++ b/drivers/gpu/nvgpu/common/gr/gr_intr.c
@@ -954,6 +954,22 @@ static void gr_intr_handle_pending_interrupts(struct gk20a *g,
 		g->ops.gr.intr.handle_semaphore_pending(g, isr_data);
 		*clear_intr &= ~intr_info->semaphore;
 	}
+
+	if (intr_info->buffer_notify != 0U) {
+		/*
+		 * This notifier event is ignored at present as there is no
+		 * real usecase.
+		 */
+		nvgpu_log(g, gpu_dbg_intr, "buffer notify interrupt");
+		*clear_intr &= ~intr_info->buffer_notify;
+	}
+
+	if (intr_info->debug_method != 0U) {
+		nvgpu_warn(g, "dropping method(0x%x) on subchannel(%d)",
+				isr_data->offset, isr_data->sub_chan);
+
+		*clear_intr &= ~intr_info->debug_method;
+	}
 }
 
 static struct nvgpu_tsg *gr_intr_get_channel_from_ctx(struct gk20a *g,
diff --git a/drivers/gpu/nvgpu/common/gr/gr_intr_priv.h b/drivers/gpu/nvgpu/common/gr/gr_intr_priv.h
index e587d07ab..a3efbd9a2 100644
--- a/drivers/gpu/nvgpu/common/gr/gr_intr_priv.h
+++ b/drivers/gpu/nvgpu/common/gr/gr_intr_priv.h
@@ -87,6 +87,19 @@ struct nvgpu_gr_intr_info {
 	 * Same value is used to clear the interrupt.
 	 */
 	u32 exception;
+	/*
+	 * This value is set when the FE receives a valid method and it
+	 * matches with the value configured in PRI_FE_DEBUG_METHOD_* pri
+	 * registers; In case of a match, FE proceeds to drop that method.
+	 * This provides a way to the SW to turn off HW decoding of this
+	 * method and convert it to a SW method.
+	 */
+	u32 debug_method;
+	/*
+	 * This value is set on the completion of a LaunchDma method with
+	 * InterruptType field configured to INTERRUPT.
+	 */
+	u32 buffer_notify;
 };
 
 /**