From 2c5f8eb5013dd8e57ed528aeaef9efda78177362 Mon Sep 17 00:00:00 2001 From: Antony Clince Alex Date: Tue, 13 Oct 2020 16:43:54 +0530 Subject: [PATCH] gpu: nvgpu: update gr interrupt handling Add support for handling following two gr interrupts: buffer_notify and debug_method. At present, the reporting of these interrupts are enabled. However, they are not individually handled and are treated as unhandled interrupts. Jira: NVGPU-6137 Change-Id: I73ec18d9a1fdb09a47834127cf5c0629730ba550 Signed-off-by: Antony Clince Alex Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2427240 Reviewed-by: automaticguardword Reviewed-by: svc-mobile-coverity Reviewed-by: svc-mobile-cert Reviewed-by: Seema Khowala Reviewed-by: Alex Waterman Reviewed-by: mobile promotions Tested-by: mobile promotions GVS: Gerrit_Virtual_Submit --- drivers/gpu/nvgpu/common/gr/gr_intr.c | 16 ++++++++++++++++ drivers/gpu/nvgpu/common/gr/gr_intr_priv.h | 13 +++++++++++++ 2 files changed, 29 insertions(+) diff --git a/drivers/gpu/nvgpu/common/gr/gr_intr.c b/drivers/gpu/nvgpu/common/gr/gr_intr.c index 3cab8df44..987e10334 100644 --- a/drivers/gpu/nvgpu/common/gr/gr_intr.c +++ b/drivers/gpu/nvgpu/common/gr/gr_intr.c @@ -954,6 +954,22 @@ static void gr_intr_handle_pending_interrupts(struct gk20a *g, g->ops.gr.intr.handle_semaphore_pending(g, isr_data); *clear_intr &= ~intr_info->semaphore; } + + if (intr_info->buffer_notify != 0U) { + /* + * This notifier event is ignored at present as there is no + * real usecase. + */ + nvgpu_log(g, gpu_dbg_intr, "buffer notify interrupt"); + *clear_intr &= ~intr_info->buffer_notify; + } + + if (intr_info->debug_method != 0U) { + nvgpu_warn(g, "dropping method(0x%x) on subchannel(%d)", + isr_data->offset, isr_data->sub_chan); + + *clear_intr &= ~intr_info->debug_method; + } } static struct nvgpu_tsg *gr_intr_get_channel_from_ctx(struct gk20a *g, diff --git a/drivers/gpu/nvgpu/common/gr/gr_intr_priv.h b/drivers/gpu/nvgpu/common/gr/gr_intr_priv.h index e587d07ab..a3efbd9a2 100644 --- a/drivers/gpu/nvgpu/common/gr/gr_intr_priv.h +++ b/drivers/gpu/nvgpu/common/gr/gr_intr_priv.h @@ -87,6 +87,19 @@ struct nvgpu_gr_intr_info { * Same value is used to clear the interrupt. */ u32 exception; + /* + * This value is set when the FE receives a valid method and it + * matches with the value configured in PRI_FE_DEBUG_METHOD_* pri + * registers; In case of a match, FE proceeds to drop that method. + * This provides a way to the SW to turn off HW decoding of this + * method and convert it to a SW method. + */ + u32 debug_method; + /* + * This value is set on the completion of a LaunchDma method with + * InterruptType field configured to INTERRUPT. + */ + u32 buffer_notify; }; /**