diff --git a/Makefile.umbrella.tmk b/Makefile.umbrella.tmk index a2e383c21..f97b20bea 100644 --- a/Makefile.umbrella.tmk +++ b/Makefile.umbrella.tmk @@ -129,7 +129,6 @@ NV_REPOSITORY_COMPONENTS += userspace/units/fifo/ramfc/gp10b NV_REPOSITORY_COMPONENTS += userspace/units/fifo/ramfc/gv11b NV_REPOSITORY_COMPONENTS += userspace/units/fifo/ramin/gk20a NV_REPOSITORY_COMPONENTS += userspace/units/fifo/ramin/gm20b -NV_REPOSITORY_COMPONENTS += userspace/units/fifo/ramin/gp10b NV_REPOSITORY_COMPONENTS += userspace/units/fifo/ramin/gv11b NV_REPOSITORY_COMPONENTS += userspace/units/fifo/runlist NV_REPOSITORY_COMPONENTS += userspace/units/fifo/runlist/gk20a diff --git a/arch/nvgpu-hal-new.yaml b/arch/nvgpu-hal-new.yaml index f4bb1561a..3f6fe145c 100644 --- a/arch/nvgpu-hal-new.yaml +++ b/arch/nvgpu-hal-new.yaml @@ -184,17 +184,17 @@ fifo: ramin_fusa: safe: yes - sources: [ hal/fifo/ramin_gp10b.h, - hal/fifo/ramin_gv11b.h, + sources: [ hal/fifo/ramin_gv11b.h, hal/fifo/ramin_gm20b.h, hal/fifo/ramin_gv11b_fusa.c, - hal/fifo/ramin_gp10b_fusa.c, hal/fifo/ramin_gm20b_fusa.c ] ramin: safe: no sources: [ hal/fifo/ramin_gk20a.h, + hal/fifo/ramin_gp10b.h, hal/fifo/ramin_gk20a.c, + hal/fifo/ramin_gp10b.c, hal/fifo/ramin_tu104.c, hal/fifo/ramin_tu104.h ] diff --git a/drivers/gpu/nvgpu/Makefile b/drivers/gpu/nvgpu/Makefile index cbea8a6e6..afc26dbe2 100644 --- a/drivers/gpu/nvgpu/Makefile +++ b/drivers/gpu/nvgpu/Makefile @@ -344,6 +344,7 @@ nvgpu-y += \ hal/fifo/ramfc_gk20a.o \ hal/fifo/ramfc_gp10b.o \ hal/fifo/ramin_gk20a.o \ + hal/fifo/ramin_gp10b.o \ hal/fifo/runlist_fifo_gv11b.o \ hal/fifo/channel_gk20a.o \ hal/fifo/channel_gm20b.o \ @@ -657,7 +658,6 @@ nvgpu-y += \ hal/fifo/ramfc_gv11b_fusa.o \ hal/fifo/ramin_gk20a_fusa.o \ hal/fifo/ramin_gm20b_fusa.o \ - hal/fifo/ramin_gp10b_fusa.o \ hal/fifo/ramin_gv11b_fusa.o \ hal/fifo/runlist_fifo_gk20a_fusa.o \ hal/fifo/runlist_fifo_gv11b_fusa.o \ diff --git a/drivers/gpu/nvgpu/Makefile.sources b/drivers/gpu/nvgpu/Makefile.sources index 8fa01cb89..f9a86ec1b 100644 --- a/drivers/gpu/nvgpu/Makefile.sources +++ b/drivers/gpu/nvgpu/Makefile.sources @@ -207,7 +207,6 @@ srcs += hal/mm/mm_gv11b_fusa.c \ hal/fifo/ramfc_gv11b_fusa.c \ hal/fifo/ramin_gk20a_fusa.c \ hal/fifo/ramin_gm20b_fusa.c \ - hal/fifo/ramin_gp10b_fusa.c \ hal/fifo/ramin_gv11b_fusa.c \ hal/fifo/runlist_fifo_gk20a_fusa.c \ hal/fifo/runlist_fifo_gv11b_fusa.c \ @@ -301,6 +300,7 @@ srcs += hal/init/hal_gp10b.c \ hal/fifo/ramfc_gk20a.c \ hal/fifo/ramfc_gp10b.c \ hal/fifo/ramin_gk20a.c \ + hal/fifo/ramin_gp10b.c \ hal/fifo/channel_gk20a.c \ hal/fifo/channel_gm20b.c \ hal/fifo/tsg_gk20a.c \ diff --git a/drivers/gpu/nvgpu/hal/fifo/ramin_gp10b_fusa.c b/drivers/gpu/nvgpu/hal/fifo/ramin_gp10b.c similarity index 96% rename from drivers/gpu/nvgpu/hal/fifo/ramin_gp10b_fusa.c rename to drivers/gpu/nvgpu/hal/fifo/ramin_gp10b.c index 0210867ae..51046e997 100644 --- a/drivers/gpu/nvgpu/hal/fifo/ramin_gp10b_fusa.c +++ b/drivers/gpu/nvgpu/hal/fifo/ramin_gp10b.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2019, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2015-2020, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), diff --git a/drivers/gpu/nvgpu/hal/fifo/ramin_gv11b.h b/drivers/gpu/nvgpu/hal/fifo/ramin_gv11b.h index 77741a46b..c7321f1d0 100644 --- a/drivers/gpu/nvgpu/hal/fifo/ramin_gv11b.h +++ b/drivers/gpu/nvgpu/hal/fifo/ramin_gv11b.h @@ -35,5 +35,7 @@ void gv11b_ramin_init_subctx_pdb(struct gk20a *g, bool replayable, u32 max_subctx_count); void gv11b_ramin_set_eng_method_buffer(struct gk20a *g, struct nvgpu_mem *inst_block, u64 gpu_va); +void gv11b_ramin_init_pdb(struct gk20a *g, struct nvgpu_mem *inst_block, + u64 pdb_addr, struct nvgpu_mem *pdb_mem); #endif /* NVGPU_RAMIN_GV11B_H */ diff --git a/drivers/gpu/nvgpu/hal/fifo/ramin_gv11b_fusa.c b/drivers/gpu/nvgpu/hal/fifo/ramin_gv11b_fusa.c index cb6d3d31a..abb5cb83f 100644 --- a/drivers/gpu/nvgpu/hal/fifo/ramin_gv11b_fusa.c +++ b/drivers/gpu/nvgpu/hal/fifo/ramin_gv11b_fusa.c @@ -138,3 +138,24 @@ void gv11b_ramin_set_eng_method_buffer(struct gk20a *g, addr_hi); } +void gv11b_ramin_init_pdb(struct gk20a *g, struct nvgpu_mem *inst_block, + u64 pdb_addr, struct nvgpu_mem *pdb_mem) +{ + u32 pdb_addr_lo = u64_lo32(pdb_addr >> ram_in_base_shift_v()); + u32 pdb_addr_hi = u64_hi32(pdb_addr); + + nvgpu_log_info(g, "pde pa=0x%llx", pdb_addr); + + nvgpu_mem_wr32(g, inst_block, ram_in_page_dir_base_lo_w(), + nvgpu_aperture_mask(g, pdb_mem, + ram_in_page_dir_base_target_sys_mem_ncoh_f(), + ram_in_page_dir_base_target_sys_mem_coh_f(), + ram_in_page_dir_base_target_vid_mem_f()) | + ram_in_page_dir_base_vol_true_f() | + ram_in_big_page_size_64kb_f() | + ram_in_page_dir_base_lo_f(pdb_addr_lo) | + ram_in_use_ver2_pt_format_true_f()); + + nvgpu_mem_wr32(g, inst_block, ram_in_page_dir_base_hi_w(), + ram_in_page_dir_base_hi_f(pdb_addr_hi)); +} diff --git a/drivers/gpu/nvgpu/hal/gr/init/gr_init_gm20b.c b/drivers/gpu/nvgpu/hal/gr/init/gr_init_gm20b.c index d88d9c691..00cc2038d 100644 --- a/drivers/gpu/nvgpu/hal/gr/init/gr_init_gm20b.c +++ b/drivers/gpu/nvgpu/hal/gr/init/gr_init_gm20b.c @@ -732,3 +732,14 @@ void gm20b_gr_init_get_default_preemption_modes( *default_graphics_preempt_mode = NVGPU_PREEMPTION_MODE_GRAPHICS_WFI; *default_compute_preempt_mode = NVGPU_PREEMPTION_MODE_COMPUTE_CTA; } + +void gm20b_gr_init_fe_go_idle_timeout(struct gk20a *g, bool enable) +{ + if (enable) { + nvgpu_writel(g, gr_fe_go_idle_timeout_r(), + gr_fe_go_idle_timeout_count_prod_f()); + } else { + nvgpu_writel(g, gr_fe_go_idle_timeout_r(), + gr_fe_go_idle_timeout_count_disabled_f()); + } +} diff --git a/drivers/gpu/nvgpu/hal/gr/init/gr_init_gm20b_fusa.c b/drivers/gpu/nvgpu/hal/gr/init/gr_init_gm20b_fusa.c index 5454c341f..dd58f0c0d 100644 --- a/drivers/gpu/nvgpu/hal/gr/init/gr_init_gm20b_fusa.c +++ b/drivers/gpu/nvgpu/hal/gr/init/gr_init_gm20b_fusa.c @@ -348,17 +348,6 @@ void gm20b_gr_init_override_context_reset(struct gk20a *g) (void) nvgpu_readl(g, gr_fecs_ctxsw_reset_ctl_r()); } -void gm20b_gr_init_fe_go_idle_timeout(struct gk20a *g, bool enable) -{ - if (enable) { - nvgpu_writel(g, gr_fe_go_idle_timeout_r(), - gr_fe_go_idle_timeout_count_prod_f()); - } else { - nvgpu_writel(g, gr_fe_go_idle_timeout_r(), - gr_fe_go_idle_timeout_count_disabled_f()); - } -} - void gm20b_gr_init_pipe_mode_override(struct gk20a *g, bool enable) { if (enable) { diff --git a/drivers/gpu/nvgpu/hal/gr/init/gr_init_gv11b.h b/drivers/gpu/nvgpu/hal/gr/init/gr_init_gv11b.h index 0f09a83df..9d696e0f0 100644 --- a/drivers/gpu/nvgpu/hal/gr/init/gr_init_gv11b.h +++ b/drivers/gpu/nvgpu/hal/gr/init/gr_init_gv11b.h @@ -71,6 +71,7 @@ u32 gv11b_gr_init_get_global_attr_cb_size(struct gk20a *g, u32 tpc_count, void gv11b_gr_init_commit_global_attrib_cb(struct gk20a *g, struct nvgpu_gr_ctx *gr_ctx, u32 tpc_count, u32 max_tpc, u64 addr, bool patch); +void gv11b_gr_init_fe_go_idle_timeout(struct gk20a *g, bool enable); #ifdef CONFIG_NVGPU_SM_DIVERSITY int gv11b_gr_init_commit_sm_id_programming(struct gk20a *g, diff --git a/drivers/gpu/nvgpu/hal/gr/init/gr_init_gv11b_fusa.c b/drivers/gpu/nvgpu/hal/gr/init/gr_init_gv11b_fusa.c index 3603dcda3..000a5e2c7 100644 --- a/drivers/gpu/nvgpu/hal/gr/init/gr_init_gv11b_fusa.c +++ b/drivers/gpu/nvgpu/hal/gr/init/gr_init_gv11b_fusa.c @@ -55,6 +55,17 @@ #define GFXP_WFI_TIMEOUT_COUNT_IN_USEC_DEFAULT 100U +void gv11b_gr_init_fe_go_idle_timeout(struct gk20a *g, bool enable) +{ + if (enable) { + nvgpu_writel(g, gr_fe_go_idle_timeout_r(), + gr_fe_go_idle_timeout_count_prod_f()); + } else { + nvgpu_writel(g, gr_fe_go_idle_timeout_r(), + gr_fe_go_idle_timeout_count_disabled_f()); + } +} + static int gr_gv11b_ecc_scrub_is_done(struct gk20a *g, struct nvgpu_gr_config *gr_config, u32 scrub_reg, u32 scrub_mask, u32 scrub_done) @@ -1035,5 +1046,4 @@ void gv11b_gr_init_restore_stats_counter_bundle_data(struct gk20a *g, gr_pri_mme_shadow_ram_index_write_trigger_f()); } - #endif diff --git a/drivers/gpu/nvgpu/hal/gr/intr/gr_intr_gv11b.h b/drivers/gpu/nvgpu/hal/gr/intr/gr_intr_gv11b.h index 44c0c9b45..60a3abddc 100644 --- a/drivers/gpu/nvgpu/hal/gr/intr/gr_intr_gv11b.h +++ b/drivers/gpu/nvgpu/hal/gr/intr/gr_intr_gv11b.h @@ -150,6 +150,7 @@ void gv11b_gr_intr_set_shader_exceptions(struct gk20a *g, u32 data); #if defined(CONFIG_NVGPU_DEBUGGER) && defined(CONFIG_NVGPU_GRAPHICS) void gv11b_gr_intr_set_tex_in_dbg(struct gk20a *g, u32 data); +void gv11b_gr_intr_set_coalesce_buffer_size(struct gk20a *g, u32 data); #endif #endif /* NVGPU_GR_INTR_GV11B_H */ diff --git a/drivers/gpu/nvgpu/hal/gr/intr/gr_intr_gv11b_fusa.c b/drivers/gpu/nvgpu/hal/gr/intr/gr_intr_gv11b_fusa.c index 0ed9afa95..bab6b5215 100644 --- a/drivers/gpu/nvgpu/hal/gr/intr/gr_intr_gv11b_fusa.c +++ b/drivers/gpu/nvgpu/hal/gr/intr/gr_intr_gv11b_fusa.c @@ -213,7 +213,7 @@ int gv11b_gr_intr_handle_sw_method(struct gk20a *g, u32 addr, gp10b_gr_intr_set_go_idle_timeout(g, data); return 0; case NVC097_SET_COALESCE_BUFFER_SIZE: - gp10b_gr_intr_set_coalesce_buffer_size(g, data); + gv11b_gr_intr_set_coalesce_buffer_size(g, data); return 0; case NVC397_SET_TEX_IN_DBG: gv11b_gr_intr_set_tex_in_dbg(g, data); @@ -2043,4 +2043,18 @@ void gv11b_gr_intr_set_tex_in_dbg(struct gk20a *g, u32 data) gr_gpcs_tpcs_sm_l1tag_ctrl_cache_surface_st_f(flag)); nvgpu_writel(g, gr_gpcs_tpcs_sm_l1tag_ctrl_r(), val); } + +void gv11b_gr_intr_set_coalesce_buffer_size(struct gk20a *g, u32 data) +{ + u32 val; + + nvgpu_log_fn(g, " "); + + val = nvgpu_readl(g, gr_gpcs_tc_debug0_r()); + val = set_field(val, gr_gpcs_tc_debug0_limit_coalesce_buffer_size_m(), + gr_gpcs_tc_debug0_limit_coalesce_buffer_size_f(data)); + nvgpu_writel(g, gr_gpcs_tc_debug0_r(), val); + + nvgpu_log_fn(g, "done"); +} #endif diff --git a/drivers/gpu/nvgpu/hal/gr/intr/gr_intr_tu104.c b/drivers/gpu/nvgpu/hal/gr/intr/gr_intr_tu104.c index 133859cad..db96c3279 100644 --- a/drivers/gpu/nvgpu/hal/gr/intr/gr_intr_tu104.c +++ b/drivers/gpu/nvgpu/hal/gr/intr/gr_intr_tu104.c @@ -101,7 +101,7 @@ int tu104_gr_intr_handle_sw_method(struct gk20a *g, u32 addr, gp10b_gr_intr_set_go_idle_timeout(g, data); return 0; case NVC097_SET_COALESCE_BUFFER_SIZE: - gp10b_gr_intr_set_coalesce_buffer_size(g, data); + gv11b_gr_intr_set_coalesce_buffer_size(g, data); return 0; case NVC597_SET_TEX_IN_DBG: gv11b_gr_intr_set_tex_in_dbg(g, data); diff --git a/drivers/gpu/nvgpu/hal/init/hal_gv11b.c b/drivers/gpu/nvgpu/hal/init/hal_gv11b.c index d0e15726d..e559d65b6 100644 --- a/drivers/gpu/nvgpu/hal/init/hal_gv11b.c +++ b/drivers/gpu/nvgpu/hal/init/hal_gv11b.c @@ -106,7 +106,6 @@ #include "hal/fifo/ramfc_gv11b.h" #include "hal/fifo/ramin_gk20a.h" #include "hal/fifo/ramin_gm20b.h" -#include "hal/fifo/ramin_gp10b.h" #include "hal/fifo/ramin_gv11b.h" #include "hal/fifo/runlist_ram_gk20a.h" #include "hal/fifo/runlist_ram_gv11b.h" @@ -482,7 +481,7 @@ static const struct gops_gr_init gv11b_ops_gr_init = { #ifdef CONFIG_NVGPU_GRAPHICS .preemption_state = gv11b_gr_init_preemption_state, #endif - .fe_go_idle_timeout = gm20b_gr_init_fe_go_idle_timeout, + .fe_go_idle_timeout = gv11b_gr_init_fe_go_idle_timeout, .load_method_init = gm20b_gr_init_load_method_init, .commit_global_timeslice = gv11b_gr_init_commit_global_timeslice, .get_bundle_cb_default_size = gv11b_gr_init_get_bundle_cb_default_size, @@ -926,7 +925,7 @@ static const struct gops_ramfc gv11b_ops_ramfc = { static const struct gops_ramin gv11b_ops_ramin = { .set_gr_ptr = gv11b_ramin_set_gr_ptr, .set_big_page_size = gm20b_ramin_set_big_page_size, - .init_pdb = gp10b_ramin_init_pdb, + .init_pdb = gv11b_ramin_init_pdb, .init_subctx_pdb = gv11b_ramin_init_subctx_pdb, .set_adr_limit = NULL, .base_shift = gk20a_ramin_base_shift, diff --git a/drivers/gpu/nvgpu/hal/init/hal_tu104.c b/drivers/gpu/nvgpu/hal/init/hal_tu104.c index 058d214ec..b14fa6ec0 100644 --- a/drivers/gpu/nvgpu/hal/init/hal_tu104.c +++ b/drivers/gpu/nvgpu/hal/init/hal_tu104.c @@ -98,7 +98,6 @@ #include "hal/fifo/ramfc_tu104.h" #include "hal/fifo/ramin_gk20a.h" #include "hal/fifo/ramin_gm20b.h" -#include "hal/fifo/ramin_gp10b.h" #include "hal/fifo/ramin_gv11b.h" #include "hal/fifo/ramin_tu104.h" #include "hal/fifo/runlist_ram_gk20a.h" @@ -521,7 +520,7 @@ static const struct gops_gr_init tu104_ops_gr_init = { #endif .fe_pwr_mode_force_on = gm20b_gr_init_fe_pwr_mode_force_on, .override_context_reset = gm20b_gr_init_override_context_reset, - .fe_go_idle_timeout = gm20b_gr_init_fe_go_idle_timeout, + .fe_go_idle_timeout = gv11b_gr_init_fe_go_idle_timeout, .load_method_init = gm20b_gr_init_load_method_init, .commit_global_timeslice = gv11b_gr_init_commit_global_timeslice, #ifdef CONFIG_NVGPU_DGPU @@ -975,7 +974,7 @@ static const struct gops_ramfc tu104_ops_ramfc = { static const struct gops_ramin tu104_ops_ramin = { .set_gr_ptr = gv11b_ramin_set_gr_ptr, .set_big_page_size = gm20b_ramin_set_big_page_size, - .init_pdb = gp10b_ramin_init_pdb, + .init_pdb = gv11b_ramin_init_pdb, .init_subctx_pdb = gv11b_ramin_init_subctx_pdb, .set_adr_limit = NULL, .base_shift = gk20a_ramin_base_shift, diff --git a/drivers/gpu/nvgpu/hal/vgpu/init/vgpu_hal_gv11b.c b/drivers/gpu/nvgpu/hal/vgpu/init/vgpu_hal_gv11b.c index 7a2c364aa..19b40240e 100644 --- a/drivers/gpu/nvgpu/hal/vgpu/init/vgpu_hal_gv11b.c +++ b/drivers/gpu/nvgpu/hal/vgpu/init/vgpu_hal_gv11b.c @@ -40,7 +40,6 @@ #include "hal/fifo/pbdma_gv11b.h" #include "hal/fifo/ramin_gk20a.h" #include "hal/fifo/ramin_gm20b.h" -#include "hal/fifo/ramin_gp10b.h" #include "hal/fifo/ramin_gv11b.h" #include "hal/fifo/runlist_ram_gv11b.h" #include "hal/fifo/runlist_fifo_gv11b.h" @@ -640,7 +639,7 @@ static const struct gops_ramfc vgpu_gv11b_ops_ramfc = { static const struct gops_ramin vgpu_gv11b_ops_ramin = { .set_gr_ptr = NULL, .set_big_page_size = gm20b_ramin_set_big_page_size, - .init_pdb = gp10b_ramin_init_pdb, + .init_pdb = gv11b_ramin_init_pdb, .init_subctx_pdb = gv11b_ramin_init_subctx_pdb, .set_adr_limit = NULL, .base_shift = gk20a_ramin_base_shift, diff --git a/libs/dgpu/libnvgpu-drv-dgpu_safe.export b/libs/dgpu/libnvgpu-drv-dgpu_safe.export index 67e9cecc7..26de16814 100644 --- a/libs/dgpu/libnvgpu-drv-dgpu_safe.export +++ b/libs/dgpu/libnvgpu-drv-dgpu_safe.export @@ -92,7 +92,6 @@ gp10b_mm_remove_bar2_vm gp10b_pbdma_get_config_auth_level_privileged gp10b_pbdma_get_fc_runlist_timeslice gp10b_pbdma_get_signature -gp10b_ramin_init_pdb gp10b_engine_init_ce_info gp10b_priv_ring_isr gp10b_priv_ring_decode_error_code @@ -180,6 +179,7 @@ gv11b_pbdma_setup_hw gv11b_ramfc_capture_ram_dump gv11b_ramfc_setup gv11b_ramin_init_subctx_pdb +gv11b_ramin_init_pdb gv11b_ramin_set_eng_method_buffer gv11b_ramin_set_gr_ptr gv11b_runlist_count_max diff --git a/libs/igpu/libnvgpu-drv-igpu_safe.export b/libs/igpu/libnvgpu-drv-igpu_safe.export index fa2ec25e5..31f6dc20b 100644 --- a/libs/igpu/libnvgpu-drv-igpu_safe.export +++ b/libs/igpu/libnvgpu-drv-igpu_safe.export @@ -92,7 +92,6 @@ gp10b_mm_remove_bar2_vm gp10b_pbdma_get_config_auth_level_privileged gp10b_pbdma_get_fc_runlist_timeslice gp10b_pbdma_get_signature -gp10b_ramin_init_pdb gp10b_engine_init_ce_info gp10b_priv_ring_isr gp10b_priv_ring_decode_error_code @@ -186,6 +185,7 @@ gv11b_pbdma_setup_hw gv11b_ramfc_capture_ram_dump gv11b_ramfc_setup gv11b_ramin_init_subctx_pdb +gv11b_ramin_init_pdb gv11b_ramin_set_eng_method_buffer gv11b_ramin_set_gr_ptr gv11b_runlist_count_max diff --git a/userspace/Makefile.sources b/userspace/Makefile.sources index 23ffdc33b..1c3863054 100644 --- a/userspace/Makefile.sources +++ b/userspace/Makefile.sources @@ -125,7 +125,6 @@ UNITS := \ $(UNIT_SRC)/fifo/ramfc/gv11b \ $(UNIT_SRC)/fifo/ramin/gk20a \ $(UNIT_SRC)/fifo/ramin/gm20b \ - $(UNIT_SRC)/fifo/ramin/gp10b \ $(UNIT_SRC)/fifo/ramin/gv11b \ $(UNIT_SRC)/fifo/runlist \ $(UNIT_SRC)/fifo/runlist/gk20a \ diff --git a/userspace/SWUTS.sources b/userspace/SWUTS.sources index d15c359ba..05bf8f144 100644 --- a/userspace/SWUTS.sources +++ b/userspace/SWUTS.sources @@ -45,7 +45,6 @@ INPUT += ../../../userspace/units/fifo/ramfc/gp10b/nvgpu-ramfc-gp10b.h INPUT += ../../../userspace/units/fifo/ramfc/gv11b/nvgpu-ramfc-gv11b.h INPUT += ../../../userspace/units/fifo/ramin/gk20a/ramin-gk20a-fusa.h INPUT += ../../../userspace/units/fifo/ramin/gm20b/ramin-gm20b-fusa.h -INPUT += ../../../userspace/units/fifo/ramin/gp10b/ramin-gp10b-fusa.h INPUT += ../../../userspace/units/fifo/ramin/gv11b/ramin-gv11b-fusa.h INPUT += ../../../userspace/units/fifo/runlist/nvgpu-runlist.h INPUT += ../../../userspace/units/fifo/runlist/gk20a/nvgpu-runlist-gk20a.h diff --git a/userspace/required_tests.ini b/userspace/required_tests.ini index 74213ce5a..991092e4b 100644 --- a/userspace/required_tests.ini +++ b/userspace/required_tests.ini @@ -1037,13 +1037,11 @@ test_gk20a_ramin_base_shift.base_shift=0 [ramin_gm20b_fusa] test_gm20b_ramin_set_big_page_size.set_big_page_size=0 -[ramin_gp10b_fusa] -test_gp10b_ramin_init_pdb.init_pdb=0 - [ramin_gv11b_fusa] test_gv11b_ramin_init_subctx_pdb.init_subctx_pdb=2 test_gv11b_ramin_set_eng_method_buffer.set_eng_method_buf=0 test_gv11b_ramin_set_gr_ptr.set_gr_ptr=0 +test_gv11b_ramin_init_pdb.init_pdb=0 [static_analysis] test_arithmetic.arithmetic=0 diff --git a/userspace/units/fifo/ramin/gp10b/Makefile b/userspace/units/fifo/ramin/gp10b/Makefile deleted file mode 100644 index 4a0c87dcc..000000000 --- a/userspace/units/fifo/ramin/gp10b/Makefile +++ /dev/null @@ -1,32 +0,0 @@ -# Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. -# -# Permission is hereby granted, free of charge, to any person obtaining a -# copy of this software and associated documentation files (the "Software"), -# to deal in the Software without restriction, including without limitation -# the rights to use, copy, modify, merge, publish, distribute, sublicense, -# and/or sell copies of the Software, and to permit persons to whom the -# Software is furnished to do so, subject to the following conditions: -# -# The above copyright notice and this permission notice shall be included in -# all copies or substantial portions of the Software. -# -# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL -# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING -# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER -# DEALINGS IN THE SOFTWARE. - -.SUFFIXES: - -OBJS = ramin-gp10b-fusa.o -MODULE = ramin-gp10b-fusa - -LIB_PATHS += -lnvgpu-fifo-common -include ../../../Makefile.units - -lib$(MODULE).so: fifo - -fifo: - $(MAKE) -C ../.. diff --git a/userspace/units/fifo/ramin/gp10b/Makefile.interface.tmk b/userspace/units/fifo/ramin/gp10b/Makefile.interface.tmk deleted file mode 100644 index 92d4e41ce..000000000 --- a/userspace/units/fifo/ramin/gp10b/Makefile.interface.tmk +++ /dev/null @@ -1,35 +0,0 @@ -################################### tell Emacs this is a -*- makefile-gmake -*- -# -# Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. -# -# Permission is hereby granted, free of charge, to any person obtaining a -# copy of this software and associated documentation files (the "Software"), -# to deal in the Software without restriction, including without limitation -# the rights to use, copy, modify, merge, publish, distribute, sublicense, -# and/or sell copies of the Software, and to permit persons to whom the -# Software is furnished to do so, subject to the following conditions: -# -# The above copyright notice and this permission notice shall be included in -# all copies or substantial portions of the Software. -# -# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL -# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING -# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER -# DEALINGS IN THE SOFTWARE. -# -# tmake for SW Mobile component makefile -# -############################################################################### - -NVGPU_UNIT_NAME=ramin-gp10b-fusa - -include $(NV_SOURCE)/kernel/nvgpu/userspace/units/Makefile.units.common.interface.tmk - -# Local Variables: -# indent-tabs-mode: t -# tab-width: 8 -# End: -# vi: set tabstop=8 noexpandtab: diff --git a/userspace/units/fifo/ramin/gp10b/Makefile.tmk b/userspace/units/fifo/ramin/gp10b/Makefile.tmk deleted file mode 100644 index ea19a8d99..000000000 --- a/userspace/units/fifo/ramin/gp10b/Makefile.tmk +++ /dev/null @@ -1,39 +0,0 @@ -################################### tell Emacs this is a -*- makefile-gmake -*- -# -# Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved. -# -# Permission is hereby granted, free of charge, to any person obtaining a -# copy of this software and associated documentation files (the "Software"), -# to deal in the Software without restriction, including without limitation -# the rights to use, copy, modify, merge, publish, distribute, sublicense, -# and/or sell copies of the Software, and to permit persons to whom the -# Software is furnished to do so, subject to the following conditions: -# -# The above copyright notice and this permission notice shall be included in -# all copies or substantial portions of the Software. -# -# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL -# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING -# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER -# DEALINGS IN THE SOFTWARE. -# -# tmake for SW Mobile component makefile -# -############################################################################### - -NVGPU_UNIT_NAME = ramin-gp10b-fusa -NVGPU_UNIT_SRCS = ramin-gp10b-fusa.c - -NVGPU_UNIT_INTERFACE_DIRS := \ - $(NV_SOURCE)/kernel/nvgpu/userspace/units/fifo - -include $(NV_SOURCE)/kernel/nvgpu/userspace/units/Makefile.units.common.tmk - -# Local Variables: -# indent-tabs-mode: t -# tab-width: 8 -# End: -# vi: set tabstop=8 noexpandtab: diff --git a/userspace/units/fifo/ramin/gp10b/ramin-gp10b-fusa.c b/userspace/units/fifo/ramin/gp10b/ramin-gp10b-fusa.c deleted file mode 100644 index b979ecf5a..000000000 --- a/userspace/units/fifo/ramin/gp10b/ramin-gp10b-fusa.c +++ /dev/null @@ -1,95 +0,0 @@ -/* - * Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ - -#include -#include - -#include -#include -#include -#include -#include - -#include "hal/fifo/ramin_gk20a.h" -#include "hal/fifo/ramin_gp10b.h" - -#include "../../nvgpu-fifo-common.h" -#include "ramin-gp10b-fusa.h" - -int test_gp10b_ramin_init_pdb(struct unit_module *m, struct gk20a *g, - void *args) -{ - struct nvgpu_mem inst_block; - struct nvgpu_mem pdb_mem; - int ret = UNIT_FAIL; - int err; - u32 data; - u32 pdb_addr_lo, pdb_addr_hi; - u64 pdb_addr; - u32 aperture; - - g->ops.ramin.alloc_size = gk20a_ramin_alloc_size; - - /* Aperture should be fixed = SYSMEM */ - nvgpu_set_enabled(g, NVGPU_MM_HONORS_APERTURE, true); - err = nvgpu_alloc_inst_block(g, &inst_block); - unit_assert(err == 0, goto done); - - err = nvgpu_dma_alloc(g, g->ops.ramin.alloc_size(), &pdb_mem); - unit_assert(err == 0, goto done); - - pdb_addr = nvgpu_mem_get_addr(g, &pdb_mem); - pdb_addr_lo = u64_lo32(pdb_addr >> ram_in_base_shift_v()); - pdb_addr_hi = u64_hi32(pdb_addr); - - aperture = ram_in_sc_page_dir_base_target_sys_mem_ncoh_v(); - - data = aperture | ram_in_page_dir_base_vol_true_f() | - ram_in_big_page_size_64kb_f() | - ram_in_page_dir_base_lo_f(pdb_addr_lo) | - ram_in_use_ver2_pt_format_true_f(); - - gp10b_ramin_init_pdb(g, &inst_block, pdb_addr, &pdb_mem); - - unit_assert(nvgpu_mem_rd32(g, &inst_block, - ram_in_page_dir_base_lo_w()) == data, goto done); - unit_assert(nvgpu_mem_rd32(g, &inst_block, - ram_in_page_dir_base_hi_w()) == - ram_in_page_dir_base_hi_f(pdb_addr_hi), goto done); - - ret = UNIT_SUCCESS; -done: - if (ret != UNIT_SUCCESS) { - unit_err(m, "%s failed\n", __func__); - } - - nvgpu_dma_free(g, &pdb_mem); - nvgpu_free_inst_block(g, &inst_block); - nvgpu_set_enabled(g, NVGPU_MM_HONORS_APERTURE, false); - return ret; -} - -struct unit_module_test ramin_gp10b_fusa_tests[] = { - UNIT_TEST(init_pdb, test_gp10b_ramin_init_pdb, NULL, 0), -}; - -UNIT_MODULE(ramin_gp10b_fusa, ramin_gp10b_fusa_tests, UNIT_PRIO_NVGPU_TEST); diff --git a/userspace/units/fifo/ramin/gp10b/ramin-gp10b-fusa.h b/userspace/units/fifo/ramin/gp10b/ramin-gp10b-fusa.h deleted file mode 100644 index 854d86d72..000000000 --- a/userspace/units/fifo/ramin/gp10b/ramin-gp10b-fusa.h +++ /dev/null @@ -1,61 +0,0 @@ -/* - * Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ -#ifndef UNIT_FIFO_RAMIN_GP10B_FUSA_H -#define UNIT_FIFO_RAMIN_GP10B_FUSA_H - -#include - -struct unit_module; -struct gk20a; - -/** @addtogroup SWUTS-fifo-ramin-gp10b - * @{ - * - * Software Unit Test Specification for fifo/ramin/gp10b - */ - -/** - * Test specification for: test_gp10b_ramin_init_pdb - * - * Description: Initialize instance block's PDB - * - * Test Type: Feature - * - * Targets: gops_ramin.init_pdb, gp10b_ramin_init_pdb - * - * Input: None - * - * Steps: - * - Configure PDB aperture, big page size, pdb address, PT format and default - * attribute. - * - Check page directory base values stored in instance block are correct. - * - * Output: Returns PASS if all branches gave expected results. FAIL otherwise. - */ -int test_gp10b_ramin_init_pdb(struct unit_module *m, struct gk20a *g, - void *args); - -/** - * @} - */ - -#endif /* UNIT_FIFO_RAMIN_GP10B_FUSA_H */ diff --git a/userspace/units/fifo/ramin/gv11b/ramin-gv11b-fusa.c b/userspace/units/fifo/ramin/gv11b/ramin-gv11b-fusa.c index 3442a951a..a22a0b183 100644 --- a/userspace/units/fifo/ramin/gv11b/ramin-gv11b-fusa.c +++ b/userspace/units/fifo/ramin/gv11b/ramin-gv11b-fusa.c @@ -213,10 +213,64 @@ done: return ret; } +int test_gv11b_ramin_init_pdb(struct unit_module *m, struct gk20a *g, + void *args) +{ + struct nvgpu_mem inst_block; + struct nvgpu_mem pdb_mem; + int ret = UNIT_FAIL; + int err; + u32 data; + u32 pdb_addr_lo, pdb_addr_hi; + u64 pdb_addr; + u32 aperture; + + g->ops.ramin.alloc_size = gk20a_ramin_alloc_size; + + /* Aperture should be fixed = SYSMEM */ + nvgpu_set_enabled(g, NVGPU_MM_HONORS_APERTURE, true); + err = nvgpu_alloc_inst_block(g, &inst_block); + unit_assert(err == 0, goto done); + + err = nvgpu_dma_alloc(g, g->ops.ramin.alloc_size(), &pdb_mem); + unit_assert(err == 0, goto done); + + pdb_addr = nvgpu_mem_get_addr(g, &pdb_mem); + pdb_addr_lo = u64_lo32(pdb_addr >> ram_in_base_shift_v()); + pdb_addr_hi = u64_hi32(pdb_addr); + + aperture = ram_in_sc_page_dir_base_target_sys_mem_ncoh_v(); + + data = aperture | ram_in_page_dir_base_vol_true_f() | + ram_in_big_page_size_64kb_f() | + ram_in_page_dir_base_lo_f(pdb_addr_lo) | + ram_in_use_ver2_pt_format_true_f(); + + gv11b_ramin_init_pdb(g, &inst_block, pdb_addr, &pdb_mem); + + unit_assert(nvgpu_mem_rd32(g, &inst_block, + ram_in_page_dir_base_lo_w()) == data, goto done); + unit_assert(nvgpu_mem_rd32(g, &inst_block, + ram_in_page_dir_base_hi_w()) == + ram_in_page_dir_base_hi_f(pdb_addr_hi), goto done); + + ret = UNIT_SUCCESS; +done: + if (ret != UNIT_SUCCESS) { + unit_err(m, "%s failed\n", __func__); + } + + nvgpu_dma_free(g, &pdb_mem); + nvgpu_free_inst_block(g, &inst_block); + nvgpu_set_enabled(g, NVGPU_MM_HONORS_APERTURE, false); + return ret; +} + struct unit_module_test ramin_gv11b_fusa_tests[] = { UNIT_TEST(set_gr_ptr, test_gv11b_ramin_set_gr_ptr, NULL, 0), UNIT_TEST(init_subctx_pdb, test_gv11b_ramin_init_subctx_pdb, NULL, 2), UNIT_TEST(set_eng_method_buf, test_gv11b_ramin_set_eng_method_buffer, NULL, 0), + UNIT_TEST(init_pdb, test_gv11b_ramin_init_pdb, NULL, 0), }; UNIT_MODULE(ramin_gv11b_fusa, ramin_gv11b_fusa_tests, UNIT_PRIO_NVGPU_TEST); diff --git a/userspace/units/fifo/ramin/gv11b/ramin-gv11b-fusa.h b/userspace/units/fifo/ramin/gv11b/ramin-gv11b-fusa.h index 673c8ec81..65e96e0c6 100644 --- a/userspace/units/fifo/ramin/gv11b/ramin-gv11b-fusa.h +++ b/userspace/units/fifo/ramin/gv11b/ramin-gv11b-fusa.h @@ -99,6 +99,27 @@ int test_gv11b_ramin_init_subctx_pdb(struct unit_module *m, struct gk20a *g, int test_gv11b_ramin_set_eng_method_buffer(struct unit_module *m, struct gk20a *g, void *args); +/** + * Test specification for: test_gv11b_ramin_init_pdb + * + * Description: Initialize instance block's PDB + * + * Test Type: Feature + * + * Targets: gops_ramin.init_pdb, gv11b_ramin_init_pdb + * + * Input: None + * + * Steps: + * - Configure PDB aperture, big page size, pdb address, PT format and default + * attribute. + * - Check page directory base values stored in instance block are correct. + * + * Output: Returns PASS if all branches gave expected results. FAIL otherwise. + */ +int test_gv11b_ramin_init_pdb(struct unit_module *m, struct gk20a *g, + void *args); + /** * @} */ diff --git a/userspace/units/gr/setup/nvgpu-gr-setup.h b/userspace/units/gr/setup/nvgpu-gr-setup.h index 0181679e6..f808c408e 100644 --- a/userspace/units/gr/setup/nvgpu-gr-setup.h +++ b/userspace/units/gr/setup/nvgpu-gr-setup.h @@ -57,7 +57,7 @@ struct unit_module; * gv11b_gr_init_commit_global_timeslice, * gv11b_gr_init_restore_stats_counter_bundle_data, * gv11b_gr_init_commit_cbes_reserve, - * gm20b_gr_init_fe_go_idle_timeout, + * gv11b_gr_init_fe_go_idle_timeout, * gm20b_gr_init_override_context_reset, * gm20b_gr_init_pipe_mode_override, * gp10b_gr_init_commit_global_bundle_cb, diff --git a/userspace/units/mm/as/as.c b/userspace/units/mm/as/as.c index 2d3dbb948..ae017d20b 100644 --- a/userspace/units/mm/as/as.c +++ b/userspace/units/mm/as/as.c @@ -41,7 +41,7 @@ #include "hal/fb/fb_mmu_fault_gv11b.h" #include "hal/fb/intr/fb_intr_gv11b.h" #include "hal/fifo/ramin_gk20a.h" -#include "hal/fifo/ramin_gp10b.h" +#include "hal/fifo/ramin_gv11b.h" #include #include #include @@ -159,7 +159,7 @@ int test_init_mm(struct unit_module *m, struct gk20a *g, void *args) g->ops.fb.compression_page_size = gp10b_fb_compression_page_size; #endif g->ops.fb.tlb_invalidate = gm20b_fb_tlb_invalidate; - g->ops.ramin.init_pdb = gp10b_ramin_init_pdb; + g->ops.ramin.init_pdb = gv11b_ramin_init_pdb; g->ops.ramin.alloc_size = gk20a_ramin_alloc_size; g->ops.fb.is_fault_buf_enabled = gv11b_fb_is_fault_buf_enabled; g->ops.fb.read_mmu_fault_buffer_size = diff --git a/userspace/units/mm/dma/dma.c b/userspace/units/mm/dma/dma.c index fb877d43c..74cea7e28 100644 --- a/userspace/units/mm/dma/dma.c +++ b/userspace/units/mm/dma/dma.c @@ -49,7 +49,7 @@ #include "hal/fb/fb_gv11b.h" #include "hal/fifo/ramin_gk20a.h" #include "hal/fifo/ramin_gm20b.h" -#include "hal/fifo/ramin_gp10b.h" +#include "hal/fifo/ramin_gv11b.h" #include "hal/pramin/pramin_init.h" #include @@ -173,7 +173,7 @@ static int init_mm(struct unit_module *m, struct gk20a *g) g->ops.fb.compression_page_size = gp10b_fb_compression_page_size; #endif g->ops.fb.tlb_invalidate = gm20b_fb_tlb_invalidate; - g->ops.ramin.init_pdb = gp10b_ramin_init_pdb; + g->ops.ramin.init_pdb = gv11b_ramin_init_pdb; g->ops.ramin.alloc_size = gk20a_ramin_alloc_size; if (g->ops.mm.is_bar1_supported(g)) { diff --git a/userspace/units/mm/gmmu/page_table/page_table.c b/userspace/units/mm/gmmu/page_table/page_table.c index 861091994..562890768 100644 --- a/userspace/units/mm/gmmu/page_table/page_table.c +++ b/userspace/units/mm/gmmu/page_table/page_table.c @@ -45,7 +45,7 @@ #include #include #include -#include +#include #include @@ -332,7 +332,7 @@ static int init_mm(struct unit_module *m, struct gk20a *g) g->ops.fb.compression_page_size = gp10b_fb_compression_page_size; #endif g->ops.fb.tlb_invalidate = gm20b_fb_tlb_invalidate; - g->ops.ramin.init_pdb = gp10b_ramin_init_pdb; + g->ops.ramin.init_pdb = gv11b_ramin_init_pdb; g->ops.ramin.alloc_size = gk20a_ramin_alloc_size; if (g->ops.mm.is_bar1_supported(g)) { diff --git a/userspace/units/mm/hal/cache/flush_gk20a_fusa/flush-gk20a-fusa.c b/userspace/units/mm/hal/cache/flush_gk20a_fusa/flush-gk20a-fusa.c index ed93738f2..49280724c 100644 --- a/userspace/units/mm/hal/cache/flush_gk20a_fusa/flush-gk20a-fusa.c +++ b/userspace/units/mm/hal/cache/flush_gk20a_fusa/flush-gk20a-fusa.c @@ -36,7 +36,7 @@ #include "hal/fb/fb_gv11b.h" #include "hal/fb/intr/fb_intr_gv11b.h" #include "hal/fifo/ramin_gk20a.h" -#include "hal/fifo/ramin_gp10b.h" +#include "hal/fifo/ramin_gv11b.h" #include "hal/mm/cache/flush_gk20a.h" #include "hal/mm/gmmu/gmmu_gp10b.h" #include "hal/mm/mm_gp10b.h" @@ -131,7 +131,7 @@ static int init_mm(struct unit_module *m, struct gk20a *g) nvgpu_gmmu_default_big_page_size; g->ops.mm.init_inst_block = gv11b_mm_init_inst_block; g->ops.mm.gmmu.get_mmu_levels = gp10b_mm_get_mmu_levels; - g->ops.ramin.init_pdb = gp10b_ramin_init_pdb; + g->ops.ramin.init_pdb = gv11b_ramin_init_pdb; g->ops.ramin.alloc_size = gk20a_ramin_alloc_size; g->ops.mm.setup_hw = nvgpu_mm_setup_hw; g->ops.fb.init_hw = gv11b_fb_init_hw; diff --git a/userspace/units/mm/hal/cache/flush_gv11b_fusa/flush-gv11b-fusa.c b/userspace/units/mm/hal/cache/flush_gv11b_fusa/flush-gv11b-fusa.c index 5737c7b4b..9ec947531 100644 --- a/userspace/units/mm/hal/cache/flush_gv11b_fusa/flush-gv11b-fusa.c +++ b/userspace/units/mm/hal/cache/flush_gv11b_fusa/flush-gv11b-fusa.c @@ -37,7 +37,7 @@ #include "hal/fb/fb_gv11b.h" #include "hal/fb/intr/fb_intr_gv11b.h" #include "hal/fifo/ramin_gk20a.h" -#include "hal/fifo/ramin_gp10b.h" +#include "hal/fifo/ramin_gv11b.h" #include "hal/mm/cache/flush_gk20a.h" #include "hal/mm/gmmu/gmmu_gp10b.h" #include "hal/mm/mm_gp10b.h" @@ -120,7 +120,7 @@ static int init_mm(struct unit_module *m, struct gk20a *g) nvgpu_gmmu_default_big_page_size; g->ops.mm.init_inst_block = gv11b_mm_init_inst_block; g->ops.mm.gmmu.get_mmu_levels = gp10b_mm_get_mmu_levels; - g->ops.ramin.init_pdb = gp10b_ramin_init_pdb; + g->ops.ramin.init_pdb = gv11b_ramin_init_pdb; g->ops.ramin.alloc_size = gk20a_ramin_alloc_size; g->ops.mm.setup_hw = nvgpu_mm_setup_hw; g->ops.fb.init_hw = gv11b_fb_init_hw; diff --git a/userspace/units/mm/hal/gp10b_fusa/mm-gp10b-fusa.c b/userspace/units/mm/hal/gp10b_fusa/mm-gp10b-fusa.c index 4885b33d6..247df023a 100644 --- a/userspace/units/mm/hal/gp10b_fusa/mm-gp10b-fusa.c +++ b/userspace/units/mm/hal/gp10b_fusa/mm-gp10b-fusa.c @@ -35,7 +35,7 @@ #include "hal/fb/fb_gv11b.h" #include "hal/fb/intr/fb_intr_gv11b.h" #include "hal/fifo/ramin_gk20a.h" -#include "hal/fifo/ramin_gp10b.h" +#include "hal/fifo/ramin_gv11b.h" #include "hal/mc/mc_gp10b.h" #include "hal/mm/cache/flush_gk20a.h" #include "hal/mm/gmmu/gmmu_gp10b.h" @@ -108,7 +108,7 @@ static int init_mm(struct unit_module *m, struct gk20a *g) memset(&g->ops.fb, 0, sizeof(g->ops.fb)); g->ops.fb.init_hw = gv11b_fb_init_hw; g->ops.fb.intr.enable = gv11b_fb_intr_enable; - g->ops.ramin.init_pdb = gp10b_ramin_init_pdb; + g->ops.ramin.init_pdb = gv11b_ramin_init_pdb; g->ops.ramin.alloc_size = gk20a_ramin_alloc_size; g->ops.mm.gmmu.get_default_big_page_size = nvgpu_gmmu_default_big_page_size; diff --git a/userspace/units/mm/hal/gv11b_fusa/mm-gv11b-fusa.c b/userspace/units/mm/hal/gv11b_fusa/mm-gv11b-fusa.c index f9b1613dc..febf3d56e 100644 --- a/userspace/units/mm/hal/gv11b_fusa/mm-gv11b-fusa.c +++ b/userspace/units/mm/hal/gv11b_fusa/mm-gv11b-fusa.c @@ -35,7 +35,7 @@ #include "hal/fb/fb_gv11b.h" #include "hal/fb/intr/fb_intr_gv11b.h" #include "hal/fifo/ramin_gk20a.h" -#include "hal/fifo/ramin_gp10b.h" +#include "hal/fifo/ramin_gv11b.h" #include "hal/mm/cache/flush_gk20a.h" #include "hal/mm/gmmu/gmmu_gp10b.h" #include "hal/mm/mm_gv11b.h" @@ -104,7 +104,7 @@ static int init_mm(struct unit_module *m, struct gk20a *g) memset(&g->ops.fb, 0, sizeof(g->ops.fb)); g->ops.fb.init_hw = gv11b_fb_init_hw; g->ops.fb.intr.enable = gv11b_fb_intr_enable; - g->ops.ramin.init_pdb = gp10b_ramin_init_pdb; + g->ops.ramin.init_pdb = gv11b_ramin_init_pdb; g->ops.ramin.alloc_size = gk20a_ramin_alloc_size; g->ops.mc.intr_stall_unit_config = mc_gp10b_intr_stall_unit_config; g->ops.mm.gmmu.get_default_big_page_size = diff --git a/userspace/units/mm/hal/mmu_fault/gv11b_fusa/mmu-fault-gv11b-fusa.c b/userspace/units/mm/hal/mmu_fault/gv11b_fusa/mmu-fault-gv11b-fusa.c index 1e6710771..2205f4d36 100644 --- a/userspace/units/mm/hal/mmu_fault/gv11b_fusa/mmu-fault-gv11b-fusa.c +++ b/userspace/units/mm/hal/mmu_fault/gv11b_fusa/mmu-fault-gv11b-fusa.c @@ -54,7 +54,7 @@ #include "hal/fifo/channel_gv11b.h" #include "hal/fifo/preempt_gv11b.h" #include "hal/fifo/ramin_gk20a.h" -#include "hal/fifo/ramin_gp10b.h" +#include "hal/fifo/ramin_gv11b.h" #include "hal/mm/cache/flush_gk20a.h" #include "hal/mm/gmmu/gmmu_gp10b.h" #include "hal/mm/gmmu/gmmu_gv11b.h" @@ -135,7 +135,7 @@ static int init_mm(struct unit_module *m, struct gk20a *g) nvgpu_gmmu_default_big_page_size; g->ops.mm.init_inst_block = gv11b_mm_init_inst_block; g->ops.mm.gmmu.get_mmu_levels = gp10b_mm_get_mmu_levels; - g->ops.ramin.init_pdb = gp10b_ramin_init_pdb; + g->ops.ramin.init_pdb = gv11b_ramin_init_pdb; g->ops.ramin.alloc_size = gk20a_ramin_alloc_size; g->ops.mm.setup_hw = nvgpu_mm_setup_hw; g->ops.fb.init_hw = gv11b_fb_init_hw; diff --git a/userspace/units/mm/mm/mm.c b/userspace/units/mm/mm/mm.c index b8e58c1ee..621a71658 100644 --- a/userspace/units/mm/mm/mm.c +++ b/userspace/units/mm/mm/mm.c @@ -45,7 +45,7 @@ #include "hal/fb/fb_mmu_fault_gv11b.h" #include "hal/fb/intr/fb_intr_gv11b.h" #include "hal/fifo/ramin_gk20a.h" -#include "hal/fifo/ramin_gp10b.h" +#include "hal/fifo/ramin_gv11b.h" #include #include @@ -473,7 +473,7 @@ int test_mm_init_hal(struct unit_module *m, struct gk20a *g, void *args) g->ops.fb.compression_page_size = gp10b_fb_compression_page_size; #endif g->ops.fb.tlb_invalidate = gm20b_fb_tlb_invalidate; - g->ops.ramin.init_pdb = gp10b_ramin_init_pdb; + g->ops.ramin.init_pdb = gv11b_ramin_init_pdb; g->ops.ramin.alloc_size = gk20a_ramin_alloc_size; g->ops.fb.is_fault_buf_enabled = gv11b_fb_is_fault_buf_enabled; g->ops.fb.read_mmu_fault_buffer_size = diff --git a/userspace/units/mm/page_table_faults/page_table_faults.c b/userspace/units/mm/page_table_faults/page_table_faults.c index 9f56ae180..4ec6e4cdd 100644 --- a/userspace/units/mm/page_table_faults/page_table_faults.c +++ b/userspace/units/mm/page_table_faults/page_table_faults.c @@ -53,7 +53,7 @@ #include "hal/fb/intr/fb_intr_gv11b.h" #include "hal/fifo/ramin_gk20a.h" #include "hal/fifo/ramin_gm20b.h" -#include "hal/fifo/ramin_gp10b.h" +#include "hal/fifo/ramin_gv11b.h" #include "hal/fb/fb_mmu_fault_gv11b.h" #include @@ -133,7 +133,7 @@ static int init_mm(struct unit_module *m, struct gk20a *g) #endif g->ops.fb.tlb_invalidate = gm20b_fb_tlb_invalidate; - g->ops.ramin.init_pdb = gp10b_ramin_init_pdb; + g->ops.ramin.init_pdb = gv11b_ramin_init_pdb; g->ops.ramin.alloc_size = gk20a_ramin_alloc_size; g->ops.mm.init_inst_block = gv11b_mm_init_inst_block;