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gpu: nvgpu: vgpu: add clear single SM error state

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Add support for clearing single SM error state for CUDA debugger.
In addition to clearing local copy of SM error state,
vgpu_gr_clear_sm_error_state now sends a command to RM server
(TEGRA_VGPU_CMD_CLEAR_SM_ERROR_STATE), to clear global ESR and
warp ESR.

Bug 1791111

Change-Id: I3a1f0644787fd900ec59a0e7974037d46a603487
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: http://git-master/r/1296311
(cherry picked from commit fd07e03c3d086f396e4d65575c576a4dd68c920a)
Reviewed-on: http://git-master/r/1299060
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Cory Perry <cperry@nvidia.com>
Tested-by: Cory Perry <cperry@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
This commit is contained in:
Thomas Fleury
2017-01-30 17:48:02 -08:00
committed by mobile promotions
parent 6c35cebdcb
commit 2caea7576a
2 changed files with 26 additions and 4 deletions
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7
include/linux/tegra_vgpu.h
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@@ -101,6 +101,7 @@ enum {
TEGRA_VGPU_CMD_GET_GPU_LOAD = 65,
TEGRA_VGPU_CMD_SUSPEND_CONTEXTS = 66,
TEGRA_VGPU_CMD_RESUME_CONTEXTS = 67,
TEGRA_VGPU_CMD_CLEAR_SM_ERROR_STATE = 68,
};
struct tegra_vgpu_connect_params {
@@ -462,6 +463,11 @@ struct tegra_vgpu_suspend_resume_contexts {
u16 chids[];
};
struct tegra_vgpu_clear_sm_error_state {
u64 handle;
u32 sm_id;
};
struct tegra_vgpu_cmd_msg {
u32 cmd;
int ret;
@@ -510,6 +516,7 @@ struct tegra_vgpu_cmd_msg {
struct tegra_vgpu_gpu_load_params gpu_load;
struct tegra_vgpu_suspend_resume_contexts suspend_contexts;
struct tegra_vgpu_suspend_resume_contexts resume_contexts;
struct tegra_vgpu_clear_sm_error_state clear_sm_error_state;
char padding[192];
} params;
};