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gpu: nvgpu: vgpu: support usermode submit on gv11b
Add the two fifo HAL ops and enable the support flag. Now that the reg base is available for vgpu as well this concludes usermode submits for virtualized gv11b. Bug 200145225 Bug 200467197 Change-Id: I2dc4c5906b4b16e3a64c6329bf85d8b8a24bf0ae Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1951525 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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@@ -44,6 +44,7 @@ int vgpu_gv11b_init_gpu_characteristics(struct gk20a *g)
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__nvgpu_set_enabled(g, NVGPU_SUPPORT_SCG, true);
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__nvgpu_set_enabled(g, NVGPU_SUPPORT_SCG, true);
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__nvgpu_set_enabled(g, NVGPU_SUPPORT_SYNCPOINT_ADDRESS, true);
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__nvgpu_set_enabled(g, NVGPU_SUPPORT_SYNCPOINT_ADDRESS, true);
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__nvgpu_set_enabled(g, NVGPU_SUPPORT_USER_SYNCPOINT, true);
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__nvgpu_set_enabled(g, NVGPU_SUPPORT_USER_SYNCPOINT, true);
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__nvgpu_set_enabled(g, NVGPU_SUPPORT_USERMODE_SUBMIT, true);
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return 0;
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return 0;
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}
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}
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@@ -422,6 +422,8 @@ static const struct gpu_ops vgpu_gv11b_ops = {
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.get_sema_incr_cmd_size = gv11b_fifo_get_sema_incr_cmd_size,
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.get_sema_incr_cmd_size = gv11b_fifo_get_sema_incr_cmd_size,
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.add_sema_cmd = gv11b_fifo_add_sema_cmd,
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.add_sema_cmd = gv11b_fifo_add_sema_cmd,
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.set_sm_exception_type_mask = vgpu_set_sm_exception_type_mask,
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.set_sm_exception_type_mask = vgpu_set_sm_exception_type_mask,
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.usermode_base = gv11b_fifo_usermode_base,
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.doorbell_token = gv11b_fifo_doorbell_token,
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},
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},
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.netlist = {
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.netlist = {
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.get_netlist_name = gv11b_netlist_get_name,
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.get_netlist_name = gv11b_netlist_get_name,
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