From 2d14c3a619b0e13147550e022739a5df574f8d30 Mon Sep 17 00:00:00 2001 From: Nitin Kumbhar Date: Fri, 4 Jan 2019 18:19:44 +0530 Subject: [PATCH] gpu: nvgpu: increase dgpu power on delay Turing board (PG189) variants (A00, A01, A02, A03) need different dealys for valid power good (PG) signal. To support all board variants change the delay to minimum required value of 250ms. Bug 200452556 JIRA NVGPU-1100 Change-Id: Iba2a6b17dec7552197cb0b7873132d83e9e09aea Signed-off-by: Nitin Kumbhar Reviewed-on: https://git-master.nvidia.com/r/1987659 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/os/linux/platform_gk20a.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/nvgpu/os/linux/platform_gk20a.h b/drivers/gpu/nvgpu/os/linux/platform_gk20a.h index c6ec007ec..6f9bea5da 100644 --- a/drivers/gpu/nvgpu/os/linux/platform_gk20a.h +++ b/drivers/gpu/nvgpu/os/linux/platform_gk20a.h @@ -1,7 +1,7 @@ /* * GK20A Platform (SoC) Interface * - * Copyright (c) 2014-2018, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2014-2019, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -50,7 +50,7 @@ struct nvgpu_pci_gpios { /* delays in milliseconds (ms) */ #define PCI_VBAR_PWR_ON_DELAY_MS 15 -#define PCI_PWR_ON_DELAY_MS 150 +#define PCI_PWR_ON_DELAY_MS 250 #define PCI_VBAR_PWR_OFF_DELAY_MS 2 #define PCI_PWR_OFF_DELAY_MS 2