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gpu: nvgpu: MISRA 21.15 fixes to pmgr code

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MISRA Rule 21.15 prohibits use of memcpy() with incompatible ptrs
to qualified/unqualified types.

To circumvent this issue we've introduced a new MISRA-compliant
nvgpu_memcpy() function.

This change switches all offending uses of memcpy() in pmgr/*.c code
over to use nvgpu_memcpy() with appropriate casts applied.

JIRA NVGPU-849

Change-Id: I949f8cff49755c4cbe328ae628cf71ace18622c7
Signed-off-by: Scott Long <scottl@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1936181
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Nicolas Benech <nbenech@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Scott Long
2018-10-25 23:56:53 -07:00
committed by mobile promotions
parent 3f314d013d
commit 2da8c07710
2 changed files with 6 additions and 4 deletions
Download Patch File Download Diff File Expand all files Collapse all files

5
drivers/gpu/nvgpu/pmgr/pwrdev.c
View File

@@ -24,6 +24,7 @@
#include <nvgpu/gk20a.h>
#include <nvgpu/boardobjgrp.h>
#include <nvgpu/boardobjgrp_e32.h>
#include <nvgpu/string.h>
#include "pwrdev.h"
#include "gp106/bios_gp106.h"
@@ -156,7 +157,7 @@ static int devinit_get_pwr_device_table(struct gk20a *g,
goto done;
}
memcpy(&pwr_sensor_table_header, pwr_device_table_ptr,
nvgpu_memcpy((u8 *)&pwr_sensor_table_header, pwr_device_table_ptr,
VBIOS_POWER_SENSORS_2X_HEADER_SIZE_08);
if (pwr_sensor_table_header.version !=
@@ -189,7 +190,7 @@ static int devinit_get_pwr_device_table(struct gk20a *g,
pwr_sensor_table_entry.flags0 = *curr_pwr_device_table_ptr;
memcpy(&pwr_sensor_table_entry.class_param0,
nvgpu_memcpy((u8 *)&pwr_sensor_table_entry.class_param0,
(curr_pwr_device_table_ptr + 1),
(VBIOS_POWER_SENSORS_2X_ENTRY_SIZE_15 - 1U));

5
drivers/gpu/nvgpu/pmgr/pwrmonitor.c
View File

@@ -24,6 +24,7 @@
#include <nvgpu/gk20a.h>
#include <nvgpu/boardobjgrp.h>
#include <nvgpu/boardobjgrp_e32.h>
#include <nvgpu/string.h>
#include "pwrdev.h"
#include "gp106/bios_gp106.h"
@@ -204,7 +205,7 @@ static int devinit_get_pwr_topology_table(struct gk20a *g,
goto done;
}
memcpy(&pwr_topology_table_header, pwr_topology_table_ptr,
nvgpu_memcpy((u8 *)&pwr_topology_table_header, pwr_topology_table_ptr,
VBIOS_POWER_TOPOLOGY_2X_HEADER_SIZE_06);
if (pwr_topology_table_header.version !=
@@ -239,7 +240,7 @@ static int devinit_get_pwr_topology_table(struct gk20a *g,
pwr_topology_table_entry.flags0 = *curr_pwr_topology_table_ptr;
pwr_topology_table_entry.pwr_rail = *(curr_pwr_topology_table_ptr + 1);
memcpy(&pwr_topology_table_entry.param0,
nvgpu_memcpy((u8 *)&pwr_topology_table_entry.param0,
(curr_pwr_topology_table_ptr + 2),
(VBIOS_POWER_TOPOLOGY_2X_ENTRY_SIZE_16 - 2U));