From 2ea4dfb5c7c5d776b6b60f28ae114d25939ad642 Mon Sep 17 00:00:00 2001 From: vinodg Date: Fri, 17 Jan 2020 17:36:53 -0800 Subject: [PATCH] gpu: nvgpu: add gr.falcon hal function to target section Add gr.falcon hal functions being used from gr.falcon unit test to the target section. Jira NVGPU-4888 Change-Id: Id90ac8babfae95805421e4b9aded6a055e10e85b Signed-off-by: vinodg Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2280795 Reviewed-by: Philip Elcan Reviewed-by: mobile promotions Tested-by: mobile promotions GVS: Gerrit_Virtual_Submit --- userspace/units/gr/falcon/nvgpu-gr-falcon.h | 29 ++++++++++++++------- 1 file changed, 19 insertions(+), 10 deletions(-) diff --git a/userspace/units/gr/falcon/nvgpu-gr-falcon.h b/userspace/units/gr/falcon/nvgpu-gr-falcon.h index 76066b613..16fc5b9eb 100644 --- a/userspace/units/gr/falcon/nvgpu-gr-falcon.h +++ b/userspace/units/gr/falcon/nvgpu-gr-falcon.h @@ -40,9 +40,14 @@ struct unit_module; * * Test Type: Feature, Error injection * - * Targets: #nvgpu_gr_falcon_init_support, - * #nvgpu_gr_falcon_load_secure_ctxsw_ucode, - * gops_gr_falcon.load_ctxsw_ucode + * Targets: nvgpu_gr_falcon_init_support, + * nvgpu_gr_falcon_load_secure_ctxsw_ucode, + * gops_gr_falcon.load_ctxsw_ucode, + * gops_gr_falcon.get_fecs_ctx_state_store_major_rev_id, + * gm20b_gr_falcon_get_fecs_ctx_state_store_major_rev_id, + * gm20b_gr_falcon_get_gpccs_start_reg_offset, + * gm20b_gr_falcon_start_gpccs, + * gm20b_gr_falcon_gpccs_base_addr * * Input: #test_gr_init_setup_ready must have been executed successfully. * @@ -68,7 +73,7 @@ int test_gr_falcon_init(struct unit_module *m, * * Test Type: Feature, Error injection * - * Targets: #nvgpu_gr_falcon_remove_support + * Targets: nvgpu_gr_falcon_remove_support * * Input: #test_gr_falcon_init must have been executed successfully. * @@ -90,7 +95,9 @@ int test_gr_falcon_deinit(struct unit_module *m, * * Test Type: Feature * - * Targets: #nvgpu_gr_falcon_init_ctxsw + * Targets: #nvgpu_gr_falcon_init_ctxsw, + * gm20b_gr_falcon_bind_instblk + * nvgpu_gr_checksum_u32 * * Input: #test_gr_falcon_init must have been executed successfully. * @@ -113,7 +120,9 @@ int test_gr_falcon_init_ctxsw(struct unit_module *m, * * Test Type: Feature * - * Targets: #nvgpu_gr_falcon_init_ctx_state + * Targets: nvgpu_gr_falcon_init_ctx_state, + * gm20b_gr_falcon_init_ctx_state, + * gp10b_gr_falcon_init_ctx_state * * Input: #test_gr_falcon_init must have been executed successfully. * @@ -134,9 +143,9 @@ int test_gr_falcon_init_ctx_state(struct unit_module *m, * * Test Type: Feature * - * Targets: #nvgpu_gr_falcon_get_fecs_ucode_segments, - * #nvgpu_gr_falcon_get_gpccs_ucode_segments, - * #nvgpu_gr_falcon_get_surface_desc_cpu_va + * Targets: nvgpu_gr_falcon_get_fecs_ucode_segments, + * nvgpu_gr_falcon_get_gpccs_ucode_segments, + * nvgpu_gr_falcon_get_surface_desc_cpu_va * * Input: #test_gr_falcon_init must have been executed successfully. * @@ -159,7 +168,7 @@ int test_gr_falcon_query_test(struct unit_module *m, * * Test Type: Error injection * - * Targets: #nvgpu_gr_falcon_init_ctxsw_ucode, + * Targets: nvgpu_gr_falcon_init_ctxsw_ucode, * gops_gr_falcon.load_ctxsw_ucode * * Input: #test_gr_falcon_init must have been executed successfully.