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gpu: nvgpu: add bvec check for common.fifo input
This patch adds boundary value check for common.fifo parameters as listed below. 1. nvgpu_channel_setup_bind() includes a condition to check that value of num_gpfifo_entries does not exceed 2^31. Otherwise prints message and returns error. 2. nvgpu_tsg_bind_channel() includes a condition to check if channel subctx had ASYNC id. If true, runqueue selector is set to 1 and 0 otherwise. This check is to be moved from devctl to common.fifo. Jira NVGPU-4817 Change-Id: Id1c9253945859c245e584b5c42b3285a6b620055 Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2278613 Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
committed by
Alex Waterman
parent
df7631efc8
commit
2fb56f2cea
@@ -2205,6 +2205,13 @@ static int channel_setup_bind_prechecks(struct nvgpu_channel *c,
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struct nvgpu_tsg *tsg;
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int err = 0;
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if (args->num_gpfifo_entries > 0x80000000U) {
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nvgpu_err(g,
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"num_gpfifo_entries exceeds max limit of 2^31");
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err = -EINVAL;
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goto fail;
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}
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/* an address space needs to have been bound at this point. */
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if (!nvgpu_channel_as_bound(c)) {
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nvgpu_err(g,
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@@ -104,6 +104,11 @@ int nvgpu_tsg_bind_channel(struct nvgpu_tsg *tsg, struct nvgpu_channel *ch)
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return -EINVAL;
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}
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/* Use runqueue selector 1 for all ASYNC ids */
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if (ch->subctx_id > CHANNEL_INFO_VEID0) {
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ch->runqueue_sel = 1;
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}
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/* all the channel part of TSG should need to be same runlist_id */
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if (tsg->runlist_id == NVGPU_INVALID_TSG_ID) {
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tsg->runlist_id = ch->runlist_id;
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@@ -1025,6 +1025,7 @@ struct nvgpu_channel *nvgpu_channel_open_new(struct gk20a *g,
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* @return 0 in case of success, < 0 in case of failure.
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* @retval -EINVAL if channel is not bound to an address space.
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* @retval -EINVAL if attempting to use kernel mode submit in a safety build.
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* @retval -EINVAL if num_gpfifo_entries in #args is greater than 2^31.
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* @retval -EEXIST if gpfifo has already been allocated for this channel.
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* @retval -E2BIG if there is no space available to append channel to runlist.
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* @retval -ETIMEDOUT if runlist update timed out.
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@@ -312,6 +312,7 @@ void nvgpu_tsg_disable(struct nvgpu_tsg *tsg);
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*
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* - Make sure channel is not already bound to a TSG.
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* - Make sure channel is not part of any runlists.
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* - If channel had ASYNC subctx id, then set runqueue selector to 1.
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* - Set runlist id of TSG to channel's runlist_id if runlist_id of TSG
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* is set to #NVGPU_INVALID_TSG_ID.
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* - Call HAL to bind channel to TSG.
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