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gpu: nvgpu: common: fix MISRA Rule 10.4 Violations
MISRA Rule 10.4 only allows the usage of arithmetic operations on operands of the same essential type category. Adding "U" at the end of the integer literals or casting operands to have same type of operands when an arithmetic operation is performed. This fixes violations where an arithmetic operation is performed on signed and unsigned int types. JIRA NVGPU-992 Change-Id: I27e3e59c3559c377b4bd3cbcfced90fdf90350f2 Signed-off-by: Sai Nikhil <snikhil@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1921459 Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Adeel Raza <araza@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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@@ -169,7 +169,7 @@ int nvgpu_ecc_counter_init_per_fbpa(struct gk20a *g,
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int num_fbpa = nvgpu_get_litter_value(g, GPU_LIT_NUM_FBPAS);
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struct nvgpu_ecc_stat *stats;
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stats = nvgpu_kzalloc(g, sizeof(*stats) * num_fbpa);
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stats = nvgpu_kzalloc(g, sizeof(*stats) * (size_t)num_fbpa);
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if (stats == NULL) {
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return -ENOMEM;
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}
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