gpu: nvgpu: remove dependency on linux header for sim_gk20a*

This patch removes linux dependencies from sim_gk20a.h under
gk20a/sim_gk20a.h. The following changes are made in this patch.

1) Created a linux based structure sim_gk20a_linux that contains a
common sim_gk20a struct inside it. The common struct sim_gk20a doesn't
contain any linux specific structs.
2) The common struct sim_gk20a contains an added function pointer which
is used to invoke gk20a_sim_esc_readl() method.
3) sim_gk20a.c is moved to nvgpu/common/linux along with a new header
sim_gk20a.h that contains the definition of struct sim_gk20a_linux.
4) struct gk20a now contains a pointer of sim_gk20a instead of the
entire object. The memory for this struct is allocated and  initialized during
gk20a_init_support() and freed during invocation of
gk20_remove_support().
5) We first obtain the pointer for struct sim_gk20a_linux from the
pointer of sim_gk20a using the container_of method in order to work on
the struct.

JIRA NVGPU-386

Change-Id: Ic82b8702642377f82694577a53c3ca0b9c1bb2ab
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1603073
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

drivers/gpu/nvgpu/common/linux/module.c

@@ -47,6 +47,7 @@
 #include "intr.h"
 #include "cde.h"
 #include "ioctl.h"
+#include "sim_gk20a.h"
 #ifdef CONFIG_TEGRA_19x_GPU
 #include "nvgpu_gpuid_t19x.h"
 #ifdef CONFIG_TEGRA_GR_VIRTUALIZATION
@@ -637,11 +638,10 @@ void gk20a_remove_support(struct gk20a *g)
 	if (g->mm.remove_support)
 		g->mm.remove_support(&g->mm);
 
-	if (g->sim.remove_support)
-		g->sim.remove_support(&g->sim);
+	if (g->sim->remove_support)
+		g->sim->remove_support(g->sim);
 
 	/* free mappings to registers, etc */
-
 	if (l->regs) {
 		iounmap(l->regs);
 		l->regs = NULL;
@@ -661,6 +661,11 @@ static int gk20a_init_support(struct platform_device *dev)
 	int err = 0;
 	struct gk20a *g = get_gk20a(&dev->dev);
 	struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g);
+	struct sim_gk20a_linux *sim_linux = nvgpu_kzalloc(g, sizeof(*sim_linux));
+	if (!sim_linux)
+		goto fail;
+
+	g->sim = &sim_linux->sim;
 
 	tegra_register_idle_unidle(gk20a_do_idle, gk20a_do_unidle, g);
 
@@ -681,13 +686,13 @@ static int gk20a_init_support(struct platform_device *dev)
 	}
 
 	if (nvgpu_platform_is_simulation(g)) {
-		g->sim.g = g;
-		g->sim.regs = gk20a_ioremap_resource(dev,
+		g->sim->g = g;
+		sim_linux->regs = gk20a_ioremap_resource(dev,
 						     GK20A_SIM_IORESOURCE_MEM,
-						     &g->sim.reg_mem);
-		if (IS_ERR(g->sim.regs)) {
+						     &sim_linux->reg_mem);
+		if (IS_ERR(sim_linux->regs)) {
 			nvgpu_err(g, "failed to remap gk20a sim regs");
-			err = PTR_ERR(g->sim.regs);
+			err = PTR_ERR(sim_linux->regs);
 			goto fail;
 		}
 
@@ -703,6 +708,8 @@ static int gk20a_init_support(struct platform_device *dev)
 	return 0;
 
 fail:
+	nvgpu_kfree(g, sim_linux);
+	g->sim = NULL;
 	return err;
 }
 

drivers/gpu/nvgpu/common/linux/sim_gk20a.c

@@ -0,0 +1,365 @@
+/*
+ * Copyright (c) 2017, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/io.h>
+#include <linux/highmem.h>
+#include <linux/platform_device.h>
+
+#include <nvgpu/log.h>
+#include <nvgpu/linux/vm.h>
+
+#include "gk20a/gk20a.h"
+#include "sim_gk20a.h"
+
+#include <nvgpu/hw/gk20a/hw_sim_gk20a.h>
+
+static inline void sim_writel(struct sim_gk20a_linux *sim_linux, u32 r, u32 v)
+{
+	writel(v, sim_linux->regs + r);
+}
+
+static inline u32 sim_readl(struct sim_gk20a_linux *sim_linux, u32 r)
+{
+	return readl(sim_linux->regs + r);
+}
+
+static void kunmap_and_free_iopage(void **kvaddr, struct page **page)
+{
+	if (*kvaddr) {
+		kunmap(*kvaddr);
+		*kvaddr = NULL;
+	}
+	if (*page) {
+		__free_page(*page);
+		*page = NULL;
+	}
+}
+
+static void gk20a_free_sim_support(struct gk20a *g)
+{
+	struct sim_gk20a_linux *sim_linux =
+		container_of(g->sim, struct sim_gk20a_linux, sim);
+	/* free sim mappings, bfrs */
+	kunmap_and_free_iopage(&sim_linux->send_bfr.kvaddr,
+			       &sim_linux->send_bfr.page);
+
+	kunmap_and_free_iopage(&sim_linux->recv_bfr.kvaddr,
+			       &sim_linux->recv_bfr.page);
+
+	kunmap_and_free_iopage(&sim_linux->msg_bfr.kvaddr,
+			       &sim_linux->msg_bfr.page);
+}
+
+static void gk20a_remove_sim_support(struct sim_gk20a *s)
+{
+	struct gk20a *g = s->g;
+	struct sim_gk20a_linux *sim_linux =
+		container_of(g->sim, struct sim_gk20a_linux, sim);
+
+	if (sim_linux->regs)
+		sim_writel(sim_linux, sim_config_r(), sim_config_mode_disabled_v());
+	gk20a_free_sim_support(g);
+
+	if (sim_linux->regs) {
+		iounmap(sim_linux->regs);
+		sim_linux->regs = NULL;
+	}
+
+	nvgpu_kfree(g, sim_linux);
+	g->sim = NULL;
+}
+
+static int alloc_and_kmap_iopage(struct gk20a *g,
+				 void **kvaddr,
+				 u64 *phys,
+				 struct page **page)
+{
+	int err = 0;
+	*page = alloc_page(GFP_KERNEL);
+
+	if (!*page) {
+		err = -ENOMEM;
+		nvgpu_err(g, "couldn't allocate io page");
+		goto fail;
+	}
+
+	*kvaddr = kmap(*page);
+	if (!*kvaddr) {
+		err = -ENOMEM;
+		nvgpu_err(g, "couldn't kmap io page");
+		goto fail;
+	}
+	*phys = page_to_phys(*page);
+	return 0;
+
+ fail:
+	kunmap_and_free_iopage(kvaddr, page);
+	return err;
+
+}
+
+static inline u32 sim_msg_header_size(void)
+{
+	return 24;/*TBD: fix the header to gt this from NV_VGPU_MSG_HEADER*/
+}
+
+static inline u32 *sim_msg_bfr(struct gk20a *g, u32 byte_offset)
+{
+	struct sim_gk20a_linux *sim_linux =
+		container_of(g->sim, struct sim_gk20a_linux, sim);
+	return (u32 *)(sim_linux->msg_bfr.kvaddr + byte_offset);
+}
+
+static inline u32 *sim_msg_hdr(struct gk20a *g, u32 byte_offset)
+{
+	return sim_msg_bfr(g, byte_offset); /*starts at 0*/
+}
+
+static inline u32 *sim_msg_param(struct gk20a *g, u32 byte_offset)
+{
+	/*starts after msg header/cmn*/
+	return sim_msg_bfr(g, byte_offset + sim_msg_header_size());
+}
+
+static inline void sim_write_hdr(struct gk20a *g, u32 func, u32 size)
+{
+	/*memset(g->sim->msg_bfr.kvaddr,0,min(PAGE_SIZE,size));*/
+	*sim_msg_hdr(g, sim_msg_signature_r()) = sim_msg_signature_valid_v();
+	*sim_msg_hdr(g, sim_msg_result_r())    = sim_msg_result_rpc_pending_v();
+	*sim_msg_hdr(g, sim_msg_spare_r())     = sim_msg_spare__init_v();
+	*sim_msg_hdr(g, sim_msg_function_r())  = func;
+	*sim_msg_hdr(g, sim_msg_length_r())    = size + sim_msg_header_size();
+}
+
+static inline u32 sim_escape_read_hdr_size(void)
+{
+	return 12; /*TBD: fix NV_VGPU_SIM_ESCAPE_READ_HEADER*/
+}
+
+static u32 *sim_send_ring_bfr(struct gk20a *g, u32 byte_offset)
+{
+	struct sim_gk20a_linux *sim_linux =
+		container_of(g->sim, struct sim_gk20a_linux, sim);
+	return (u32 *)(sim_linux->send_bfr.kvaddr + byte_offset);
+}
+
+static int rpc_send_message(struct gk20a *g)
+{
+	/* calculations done in units of u32s */
+	u32 send_base = sim_send_put_pointer_v(g->sim->send_ring_put) * 2;
+	u32 dma_offset = send_base + sim_dma_r()/sizeof(u32);
+	u32 dma_hi_offset = send_base + sim_dma_hi_r()/sizeof(u32);
+	struct sim_gk20a_linux *sim_linux =
+		container_of(g->sim, struct sim_gk20a_linux, sim);
+
+	*sim_send_ring_bfr(g, dma_offset*sizeof(u32)) =
+		sim_dma_target_phys_pci_coherent_f() |
+		sim_dma_status_valid_f() |
+		sim_dma_size_4kb_f() |
+		sim_dma_addr_lo_f(sim_linux->msg_bfr.phys >> PAGE_SHIFT);
+
+	*sim_send_ring_bfr(g, dma_hi_offset*sizeof(u32)) =
+		u64_hi32(sim_linux->msg_bfr.phys);
+
+	*sim_msg_hdr(g, sim_msg_sequence_r()) = g->sim->sequence_base++;
+
+	g->sim->send_ring_put = (g->sim->send_ring_put + 2 * sizeof(u32)) %
+		PAGE_SIZE;
+
+	__cpuc_flush_dcache_area(sim_linux->msg_bfr.kvaddr, PAGE_SIZE);
+	__cpuc_flush_dcache_area(sim_linux->send_bfr.kvaddr, PAGE_SIZE);
+	__cpuc_flush_dcache_area(sim_linux->recv_bfr.kvaddr, PAGE_SIZE);
+
+	/* Update the put pointer. This will trap into the host. */
+	sim_writel(sim_linux, sim_send_put_r(), g->sim->send_ring_put);
+
+	return 0;
+}
+
+static inline u32 *sim_recv_ring_bfr(struct gk20a *g, u32 byte_offset)
+{
+	struct sim_gk20a_linux *sim_linux =
+		container_of(g->sim, struct sim_gk20a_linux, sim);
+	return (u32 *)(sim_linux->recv_bfr.kvaddr + byte_offset);
+}
+
+static int rpc_recv_poll(struct gk20a *g)
+{
+	u64 recv_phys_addr;
+	struct sim_gk20a_linux *sim_linux =
+		container_of(g->sim, struct sim_gk20a_linux, sim);
+
+	/* XXX This read is not required (?) */
+	/*pVGpu->recv_ring_get = VGPU_REG_RD32(pGpu, NV_VGPU_RECV_GET);*/
+
+	/* Poll the recv ring get pointer in an infinite loop*/
+	do {
+		g->sim->recv_ring_put = sim_readl(sim_linux, sim_recv_put_r());
+	} while (g->sim->recv_ring_put == g->sim->recv_ring_get);
+
+	/* process all replies */
+	while (g->sim->recv_ring_put != g->sim->recv_ring_get) {
+		/* these are in u32 offsets*/
+		u32 dma_lo_offset =
+			sim_recv_put_pointer_v(g->sim->recv_ring_get)*2 + 0;
+		u32 dma_hi_offset = dma_lo_offset + 1;
+		u32 recv_phys_addr_lo = sim_dma_addr_lo_v(
+				*sim_recv_ring_bfr(g, dma_lo_offset*4));
+		u32 recv_phys_addr_hi = sim_dma_hi_addr_v(
+				*sim_recv_ring_bfr(g, dma_hi_offset*4));
+
+		recv_phys_addr = (u64)recv_phys_addr_hi << 32 |
+				 (u64)recv_phys_addr_lo << PAGE_SHIFT;
+
+		if (recv_phys_addr != sim_linux->msg_bfr.phys) {
+			nvgpu_err(g, "%s Error in RPC reply",
+				__func__);
+			return -1;
+		}
+
+		/* Update GET pointer */
+		g->sim->recv_ring_get = (g->sim->recv_ring_get + 2*sizeof(u32)) %
+			PAGE_SIZE;
+
+		__cpuc_flush_dcache_area(sim_linux->msg_bfr.kvaddr, PAGE_SIZE);
+		__cpuc_flush_dcache_area(sim_linux->send_bfr.kvaddr, PAGE_SIZE);
+		__cpuc_flush_dcache_area(sim_linux->recv_bfr.kvaddr, PAGE_SIZE);
+
+		sim_writel(sim_linux, sim_recv_get_r(), g->sim->recv_ring_get);
+
+		g->sim->recv_ring_put = sim_readl(sim_linux, sim_recv_put_r());
+	}
+
+	return 0;
+}
+
+static int issue_rpc_and_wait(struct gk20a *g)
+{
+	int err;
+
+	err = rpc_send_message(g);
+	if (err) {
+		nvgpu_err(g, "%s failed rpc_send_message",
+			__func__);
+		return err;
+	}
+
+	err = rpc_recv_poll(g);
+	if (err) {
+		nvgpu_err(g, "%s failed rpc_recv_poll",
+			__func__);
+		return err;
+	}
+
+	/* Now check if RPC really succeeded */
+	if (*sim_msg_hdr(g, sim_msg_result_r()) != sim_msg_result_success_v()) {
+		nvgpu_err(g, "%s received failed status!",
+			__func__);
+		return -(*sim_msg_hdr(g, sim_msg_result_r()));
+	}
+	return 0;
+}
+
+static int gk20a_sim_esc_readl(struct gk20a *g, char *path, u32 index, u32 *data)
+{
+	int err;
+	size_t pathlen = strlen(path);
+	u32 data_offset;
+
+	sim_write_hdr(g, sim_msg_function_sim_escape_read_v(),
+		      sim_escape_read_hdr_size());
+	*sim_msg_param(g, 0) = index;
+	*sim_msg_param(g, 4) = sizeof(u32);
+	data_offset = roundup(0xc +  pathlen + 1, sizeof(u32));
+	*sim_msg_param(g, 8) = data_offset;
+	strcpy((char *)sim_msg_param(g, 0xc), path);
+
+	err = issue_rpc_and_wait(g);
+
+	if (!err)
+		memcpy(data, sim_msg_param(g, data_offset), sizeof(u32));
+	return err;
+}
+
+
+int gk20a_init_sim_support(struct gk20a *g)
+{
+	int err = 0;
+	u64 phys;
+	struct sim_gk20a_linux *sim_linux =
+		container_of(g->sim, struct sim_gk20a_linux, sim);
+
+	/* allocate sim event/msg buffers */
+	err = alloc_and_kmap_iopage(g, &sim_linux->send_bfr.kvaddr,
+				    &sim_linux->send_bfr.phys,
+				    &sim_linux->send_bfr.page);
+
+	err = err || alloc_and_kmap_iopage(g, &sim_linux->recv_bfr.kvaddr,
+					   &sim_linux->recv_bfr.phys,
+					   &sim_linux->recv_bfr.page);
+
+	err = err || alloc_and_kmap_iopage(g, &sim_linux->msg_bfr.kvaddr,
+					   &sim_linux->msg_bfr.phys,
+					   &sim_linux->msg_bfr.page);
+
+	if (!(sim_linux->send_bfr.kvaddr && sim_linux->recv_bfr.kvaddr &&
+	      sim_linux->msg_bfr.kvaddr)) {
+		nvgpu_err(g, "couldn't allocate all sim buffers");
+		goto fail;
+	}
+
+	/*mark send ring invalid*/
+	sim_writel(sim_linux, sim_send_ring_r(), sim_send_ring_status_invalid_f());
+
+	/*read get pointer and make equal to put*/
+	g->sim->send_ring_put = sim_readl(sim_linux, sim_send_get_r());
+	sim_writel(sim_linux, sim_send_put_r(), g->sim->send_ring_put);
+
+	/*write send ring address and make it valid*/
+	phys = sim_linux->send_bfr.phys;
+	sim_writel(sim_linux, sim_send_ring_hi_r(),
+		   sim_send_ring_hi_addr_f(u64_hi32(phys)));
+	sim_writel(sim_linux, sim_send_ring_r(),
+		   sim_send_ring_status_valid_f() |
+		   sim_send_ring_target_phys_pci_coherent_f() |
+		   sim_send_ring_size_4kb_f() |
+		   sim_send_ring_addr_lo_f(phys >> PAGE_SHIFT));
+
+	/*repeat for recv ring (but swap put,get as roles are opposite) */
+	sim_writel(sim_linux, sim_recv_ring_r(), sim_recv_ring_status_invalid_f());
+
+	/*read put pointer and make equal to get*/
+	g->sim->recv_ring_get = sim_readl(sim_linux, sim_recv_put_r());
+	sim_writel(sim_linux, sim_recv_get_r(), g->sim->recv_ring_get);
+
+	/*write send ring address and make it valid*/
+	phys = sim_linux->recv_bfr.phys;
+	sim_writel(sim_linux, sim_recv_ring_hi_r(),
+		   sim_recv_ring_hi_addr_f(u64_hi32(phys)));
+	sim_writel(sim_linux, sim_recv_ring_r(),
+		   sim_recv_ring_status_valid_f() |
+		   sim_recv_ring_target_phys_pci_coherent_f() |
+		   sim_recv_ring_size_4kb_f() |
+		   sim_recv_ring_addr_lo_f(phys >> PAGE_SHIFT));
+
+	g->sim->remove_support = gk20a_remove_sim_support;
+	g->sim->esc_readl = gk20a_sim_esc_readl;
+	return 0;
+
+ fail:
+	gk20a_free_sim_support(g);
+	return err;
+}

drivers/gpu/nvgpu/common/linux/sim_gk20a.h

@@ -0,0 +1,39 @@
+/*
+ * drivers/video/tegra/host/gk20a/sim_gk20a.h
+ *
+ * GK20A sim support
+ *
+ * Copyright (c) 2017, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef __SIM_GK20A_LINUX_H__
+#define __SIM_GK20A_LINUX_H__
+
+#include "gk20a/sim_gk20a.h"
+
+struct sim_gk20a_linux {
+	struct sim_gk20a sim;
+	struct resource *reg_mem;
+	void __iomem *regs;
+	struct {
+		struct page *page;
+		void *kvaddr;
+		u64 phys;
+	} send_bfr, recv_bfr, msg_bfr;
+};
+
+int gk20a_init_sim_support(struct gk20a *g);
+
+#endif