nv-tegra-mirror/linux-nvgpu
1
0
Fork 0
mirror of git://nv-tegra.nvidia.com/linux-nvgpu.git synced 2025-12-24 10:34:43 +03:00
Code Issues Packages Projects Releases Wiki Activity

gpu: nvgpu: move fence_gk20a to common/fence

Browse Source 
Move gk20a/fence_gk20a.c to common/fence/fence.c

Renamed
gk20a_fence_from_semaphore -> nvgpu_fence_from_semaphore
gk20a_fence_from_syncpt -> nvgpu_fence_from_syncpt
gk20a_alloc_fence_pool -> nvgpu_fence_pool_alloc
gk20a_free_fence_pool -> nvgpu_fence_pool_free
gk20a_alloc_fence -> nvgpu_fence_alloc
gk20a_init_fence -> nvgpu_fence_init
gk20a_fence_put -> nvgpu_fence_put
gk20a_fence_get -> nvgpu_fence_get
gk20a_fence_wait -> nvgpu_fence_wait
gk20a_fence_is_expired -> nvgpu_fence_is_expired
gk20a_fence_install_fd -> nvgpu_fence_install_fd
gk20a_fence_ops struct -> nvgpu_fence_ops struct
gk20a_fence struct -> nvgpu_fence_type struct

JIRA NVGPU-1982

Change-Id: Ife77b2c3c386ff4368683c78ca02f00c99cddb4b
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2093002
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Seema Khowala
2019-04-08 21:12:00 -07:00
committed by mobile promotions
parent f57d9f97c2
commit 312f91f991
24 changed files with 219 additions and 234 deletions
Download Patch File Download Diff File Expand all files Collapse all files

18
drivers/gpu/nvgpu/common/ce2.c
View File

@@ -24,11 +24,11 @@
#include <nvgpu/gk20a.h>
#include <nvgpu/channel.h>
#include <nvgpu/utils.h>
#include <nvgpu/fence.h>
#include <nvgpu/hw/gk20a/hw_pbdma_gk20a.h>
#include "gk20a/ce2_gk20a.h"
#include "gk20a/fence_gk20a.h"
static inline u32 gk20a_get_valid_launch_flags(struct gk20a *g, u32 launch_flags)
{
@@ -50,7 +50,7 @@ int gk20a_ce_execute_ops(struct gk20a *g,
u32 launch_flags,
u32 request_operation,
u32 submit_flags,
struct gk20a_fence **gk20a_fence_out)
struct nvgpu_fence_type **fence_out)
{
int ret = -EPERM;
struct gk20a_ce_app *ce_app = g->ce_app;
@@ -63,7 +63,7 @@ int gk20a_ce_execute_ops(struct gk20a *g,
u32 dma_copy_class;
struct nvgpu_gpfifo_entry gpfifo;
struct nvgpu_channel_fence fence = {0, 0};
struct gk20a_fence *ce_cmd_buf_fence_out = NULL;
struct nvgpu_fence_type *ce_cmd_buf_fence_out = NULL;
if (!ce_app->initialised || ce_app->app_state != NVGPU_CE_ACTIVE) {
goto end;
@@ -102,13 +102,13 @@ int gk20a_ce_execute_ops(struct gk20a *g,
cmd_buf_cpu_va = (u32 *)ce_ctx->cmd_buf_mem.cpu_va;
if (ce_ctx->postfences[ce_ctx->cmd_buf_read_queue_offset] != NULL) {
struct gk20a_fence **prev_post_fence =
struct nvgpu_fence_type **prev_post_fence =
&ce_ctx->postfences[ce_ctx->cmd_buf_read_queue_offset];
ret = gk20a_fence_wait(g, *prev_post_fence,
ret = nvgpu_fence_wait(g, *prev_post_fence,
nvgpu_get_poll_timeout(g));
gk20a_fence_put(*prev_post_fence);
nvgpu_fence_put(*prev_post_fence);
*prev_post_fence = NULL;
if (ret != 0) {
goto noop;
@@ -147,9 +147,9 @@ int gk20a_ce_execute_ops(struct gk20a *g,
if (ret == 0) {
ce_ctx->postfences[ce_ctx->cmd_buf_read_queue_offset] =
ce_cmd_buf_fence_out;
if (gk20a_fence_out != NULL) {
gk20a_fence_get(ce_cmd_buf_fence_out);
*gk20a_fence_out = ce_cmd_buf_fence_out;
if (fence_out != NULL) {
nvgpu_fence_get(ce_cmd_buf_fence_out);
*fence_out = ce_cmd_buf_fence_out;
}
/* Next available command buffer queue Index */