From 31b8ecbcee172e05e3cc2a6a7ca32be9b6511655 Mon Sep 17 00:00:00 2001 From: Seema Khowala Date: Mon, 2 Mar 2020 14:42:46 -0800 Subject: [PATCH] gpu: nvgpu: gp10b: sim: handle priv ring interrupts priv_ring interrupts are enabled for sim. Handle the interrupt on sim too. JIRA NVGPU-4864 JIRA NVGPU-5017 Change-Id: I2ff16c0a8ff152839765556dd3b117995f9de109 Signed-off-by: Seema Khowala Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2306040 Reviewed-by: svc-mobile-coverity Reviewed-by: svc-mobile-misra Reviewed-by: svc-mobile-cert Reviewed-by: Seshendra Gadagottu Reviewed-by: Alex Waterman Reviewed-by: mobile promotions Tested-by: mobile promotions GVS: Gerrit_Virtual_Submit --- drivers/gpu/nvgpu/hal/priv_ring/priv_ring_gp10b_fusa.c | 9 +-------- 1 file changed, 1 insertion(+), 8 deletions(-) diff --git a/drivers/gpu/nvgpu/hal/priv_ring/priv_ring_gp10b_fusa.c b/drivers/gpu/nvgpu/hal/priv_ring/priv_ring_gp10b_fusa.c index 1afd04e5d..699d0eed7 100644 --- a/drivers/gpu/nvgpu/hal/priv_ring/priv_ring_gp10b_fusa.c +++ b/drivers/gpu/nvgpu/hal/priv_ring/priv_ring_gp10b_fusa.c @@ -1,7 +1,7 @@ /* * GP10B priv ring * - * Copyright (c) 2017-2019, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2017-2020, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -211,13 +211,6 @@ void gp10b_priv_ring_isr(struct gk20a *g) u32 cmd; s32 retry; -#ifdef CONFIG_NVGPU_SIM - if (nvgpu_is_enabled(g, NVGPU_IS_FMODEL)) { - nvgpu_info(g, "unhandled priv ring intr"); - return; - } -#endif - status0 = nvgpu_readl(g, pri_ringmaster_intr_status0_r()); status1 = nvgpu_readl(g, pri_ringmaster_intr_status1_r());