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gpu: nvgpu: Use NVLINK config instead of has_physical_mode

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This flag - has_physical_mode - doesn't seem to do much other than
force the PTE/PDE and inst block addresses to be physical instead
of potentially IOMMUed.

There is a reason to do this on volta (nvlink not being IOMMU'able
being the primary reason) but this flag is too general it seems.
The flag was being enabled on all native platforms. The problem is
that some page tables (the maxwell small page directories) could
be larger than 4KB which meant that the allocation used for them
could be potentially discontiguous. Discontiguous page directories
obviously is incorrect.

This patch deletes the has_physical_mode flag and instead replaces
the places where it's checked with a check for nvlink being
enabled. Since we _do_ want to program phyiscal PDEs and PTEs for
NVLINK devices (regardless of IOMMU status they always access
memory by physical address) we need a check for NVLINK state.

Bug 200414723

Change-Id: I09ad86b12d8aabcf9648a22503f4747fd63514dd
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1792163
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Alex Waterman
2018-08-03 10:36:30 -07:00
committed by mobile promotions
parent 2a25d03f2b
commit 32127c6515
5 changed files with 6 additions and 9 deletions
Download Patch File Download Diff File Expand all files Collapse all files

5
drivers/gpu/nvgpu/common/mm/gmmu.c
View File

@@ -215,10 +215,11 @@ static u64 nvgpu_pde_phys_addr(struct gk20a *g, struct nvgpu_gmmu_pd *pd)
{ {
u64 page_addr; u64 page_addr;
if (g->mm.has_physical_mode) if (nvgpu_is_enabled(g, NVGPU_SUPPORT_NVLINK)) {
page_addr = nvgpu_mem_get_phys_addr(g, pd->mem); page_addr = nvgpu_mem_get_phys_addr(g, pd->mem);
else } else {
page_addr = nvgpu_mem_get_addr(g, pd->mem); page_addr = nvgpu_mem_get_addr(g, pd->mem);
}
return page_addr + pd->mem_offs; return page_addr + pd->mem_offs;
} }

5
drivers/gpu/nvgpu/common/mm/mm.c
View File

@@ -128,10 +128,11 @@ int nvgpu_mm_suspend(struct gk20a *g)
u64 nvgpu_inst_block_addr(struct gk20a *g, struct nvgpu_mem *inst_block) u64 nvgpu_inst_block_addr(struct gk20a *g, struct nvgpu_mem *inst_block)
{ {
if (g->mm.has_physical_mode) if (nvgpu_is_enabled(g, NVGPU_SUPPORT_NVLINK)) {
return nvgpu_mem_get_phys_addr(g, inst_block); return nvgpu_mem_get_phys_addr(g, inst_block);
else } else {
return nvgpu_mem_get_addr(g, inst_block); return nvgpu_mem_get_addr(g, inst_block);
}
} }
void nvgpu_free_inst_block(struct gk20a *g, struct nvgpu_mem *inst_block) void nvgpu_free_inst_block(struct gk20a *g, struct nvgpu_mem *inst_block)

1
drivers/gpu/nvgpu/include/nvgpu/mm.h
View File

@@ -147,7 +147,6 @@ struct mm_gk20a {
bool ltc_enabled_current; bool ltc_enabled_current;
bool ltc_enabled_target; bool ltc_enabled_target;
bool disable_bigpage; bool disable_bigpage;
bool has_physical_mode;
struct nvgpu_mem sysmem_flush; struct nvgpu_mem sysmem_flush;

2
drivers/gpu/nvgpu/os/linux/module.c
View File

@@ -1257,8 +1257,6 @@ static int gk20a_probe(struct platform_device *dev)
goto return_err; goto return_err;
} }
gk20a->mm.has_physical_mode = !nvgpu_is_hypervisor_mode(gk20a);
return 0; return 0;
return_err: return_err:

2
drivers/gpu/nvgpu/os/linux/pci.c
View File

@@ -806,8 +806,6 @@ static int nvgpu_pci_probe(struct pci_dev *pdev,
} }
} }
g->mm.has_physical_mode = false;
return 0; return 0;
err_free_irq: err_free_irq: