diff --git a/drivers/gpu/nvgpu/common/fifo/runlist.c b/drivers/gpu/nvgpu/common/fifo/runlist.c index cb7855b08..5f39c3134 100644 --- a/drivers/gpu/nvgpu/common/fifo/runlist.c +++ b/drivers/gpu/nvgpu/common/fifo/runlist.c @@ -32,7 +32,7 @@ void nvgpu_runlist_lock_active_runlists(struct gk20a *g) { struct fifo_gk20a *f = &g->fifo; - struct fifo_runlist_info_gk20a *runlist; + struct nvgpu_runlist_info *runlist; u32 i; nvgpu_log_info(g, "acquire runlist_lock for active runlists"); @@ -45,7 +45,7 @@ void nvgpu_runlist_lock_active_runlists(struct gk20a *g) void nvgpu_runlist_unlock_active_runlists(struct gk20a *g) { struct fifo_gk20a *f = &g->fifo; - struct fifo_runlist_info_gk20a *runlist; + struct nvgpu_runlist_info *runlist; u32 i; nvgpu_log_info(g, "release runlist_lock for active runlists"); @@ -56,7 +56,7 @@ void nvgpu_runlist_unlock_active_runlists(struct gk20a *g) } static u32 nvgpu_runlist_append_tsg(struct gk20a *g, - struct fifo_runlist_info_gk20a *runlist, + struct nvgpu_runlist_info *runlist, u32 **runlist_entry, u32 *entries_left, struct tsg_gk20a *tsg) @@ -123,7 +123,7 @@ static u32 nvgpu_runlist_append_tsg(struct gk20a *g, static u32 nvgpu_runlist_append_prio(struct fifo_gk20a *f, - struct fifo_runlist_info_gk20a *runlist, + struct nvgpu_runlist_info *runlist, u32 **runlist_entry, u32 *entries_left, u32 interleave_level) @@ -151,7 +151,7 @@ static u32 nvgpu_runlist_append_prio(struct fifo_gk20a *f, } static u32 nvgpu_runlist_append_hi(struct fifo_gk20a *f, - struct fifo_runlist_info_gk20a *runlist, + struct nvgpu_runlist_info *runlist, u32 **runlist_entry, u32 *entries_left) { @@ -167,7 +167,7 @@ static u32 nvgpu_runlist_append_hi(struct fifo_gk20a *f, } static u32 nvgpu_runlist_append_med(struct fifo_gk20a *f, - struct fifo_runlist_info_gk20a *runlist, + struct nvgpu_runlist_info *runlist, u32 **runlist_entry, u32 *entries_left) { @@ -206,7 +206,7 @@ static u32 nvgpu_runlist_append_med(struct fifo_gk20a *f, } static u32 nvgpu_runlist_append_low(struct fifo_gk20a *f, - struct fifo_runlist_info_gk20a *runlist, + struct nvgpu_runlist_info *runlist, u32 **runlist_entry, u32 *entries_left) { @@ -266,7 +266,7 @@ static u32 nvgpu_runlist_append_low(struct fifo_gk20a *f, } static u32 nvgpu_runlist_append_flat(struct fifo_gk20a *f, - struct fifo_runlist_info_gk20a *runlist, + struct nvgpu_runlist_info *runlist, u32 **runlist_entry, u32 *entries_left) { @@ -291,7 +291,7 @@ static u32 nvgpu_runlist_append_flat(struct fifo_gk20a *f, } u32 nvgpu_runlist_construct_locked(struct fifo_gk20a *f, - struct fifo_runlist_info_gk20a *runlist, + struct nvgpu_runlist_info *runlist, u32 buf_id, u32 max_entries) { @@ -317,7 +317,7 @@ static bool gk20a_runlist_modify_active_locked(struct gk20a *g, u32 runlist_id, struct channel_gk20a *ch, bool add) { struct fifo_gk20a *f = &g->fifo; - struct fifo_runlist_info_gk20a *runlist = NULL; + struct nvgpu_runlist_info *runlist = NULL; struct tsg_gk20a *tsg = NULL; runlist = f->runlist_info[runlist_id]; @@ -363,7 +363,7 @@ static int gk20a_runlist_reconstruct_locked(struct gk20a *g, u32 runlist_id, u32 buf_id, bool add_entries) { struct fifo_gk20a *f = &g->fifo; - struct fifo_runlist_info_gk20a *runlist = NULL; + struct nvgpu_runlist_info *runlist = NULL; runlist = f->runlist_info[runlist_id]; @@ -393,7 +393,7 @@ int nvgpu_runlist_update_locked(struct gk20a *g, u32 runlist_id, { int ret = 0; struct fifo_gk20a *f = &g->fifo; - struct fifo_runlist_info_gk20a *runlist = NULL; + struct nvgpu_runlist_info *runlist = NULL; u32 buf_id; bool add_entries; @@ -448,7 +448,7 @@ int nvgpu_runlist_reschedule(struct channel_gk20a *ch, bool preempt_next, bool wait_preempt) { struct gk20a *g = ch->g; - struct fifo_runlist_info_gk20a *runlist; + struct nvgpu_runlist_info *runlist; u32 token = PMU_INVALID_MUTEX_OWNER_ID; int mutex_ret = 0; int ret = 0; @@ -496,7 +496,7 @@ static int nvgpu_runlist_update(struct gk20a *g, u32 runlist_id, struct channel_gk20a *ch, bool add, bool wait_for_finish) { - struct fifo_runlist_info_gk20a *runlist = NULL; + struct nvgpu_runlist_info *runlist = NULL; struct fifo_gk20a *f = &g->fifo; u32 token = PMU_INVALID_MUTEX_OWNER_ID; int mutex_ret = 0; @@ -623,7 +623,7 @@ void nvgpu_runlist_cleanup_sw(struct gk20a *g) { struct fifo_gk20a *f = &g->fifo; u32 i, j; - struct fifo_runlist_info_gk20a *runlist; + struct nvgpu_runlist_info *runlist; if ((f == NULL) || (f->runlist_info == NULL)) { return; @@ -657,7 +657,7 @@ void nvgpu_runlist_cleanup_sw(struct gk20a *g) static void nvgpu_init_runlist_enginfo(struct gk20a *g, struct fifo_gk20a *f) { - struct fifo_runlist_info_gk20a *runlist; + struct nvgpu_runlist_info *runlist; struct fifo_engine_info_gk20a *engine_info; u32 i, active_engine_id, pbdma_id, engine_id; @@ -697,7 +697,7 @@ static void nvgpu_init_runlist_enginfo(struct gk20a *g, struct fifo_gk20a *f) int nvgpu_runlist_setup_sw(struct gk20a *g) { struct fifo_gk20a *f = &g->fifo; - struct fifo_runlist_info_gk20a *runlist; + struct nvgpu_runlist_info *runlist; unsigned int runlist_id; u32 i, j; u32 num_runlists = 0U; @@ -806,7 +806,7 @@ u32 nvgpu_runlist_get_runlists_mask(struct gk20a *g, u32 id, { u32 i, runlists_mask = 0; struct fifo_gk20a *f = &g->fifo; - struct fifo_runlist_info_gk20a *runlist; + struct nvgpu_runlist_info *runlist; /* engine and/or pbdma ids are known */ if (act_eng_bitmask != 0U || pbdma_bitmask != 0U) { @@ -852,7 +852,7 @@ u32 nvgpu_runlist_get_runlists_mask(struct gk20a *g, u32 id, void nvgpu_runlist_unlock_runlists(struct gk20a *g, u32 runlists_mask) { struct fifo_gk20a *f = &g->fifo; - struct fifo_runlist_info_gk20a *runlist; + struct nvgpu_runlist_info *runlist; u32 i; nvgpu_log_info(g, "release runlist_lock for runlists set in " diff --git a/drivers/gpu/nvgpu/common/fifo/tsg.c b/drivers/gpu/nvgpu/common/fifo/tsg.c index 269537241..05cd5c690 100644 --- a/drivers/gpu/nvgpu/common/fifo/tsg.c +++ b/drivers/gpu/nvgpu/common/fifo/tsg.c @@ -67,7 +67,7 @@ struct tsg_gk20a *nvgpu_tsg_get_from_id(struct gk20a *g, u32 tsgid) static bool gk20a_is_channel_active(struct gk20a *g, struct channel_gk20a *ch) { struct fifo_gk20a *f = &g->fifo; - struct fifo_runlist_info_gk20a *runlist; + struct nvgpu_runlist_info *runlist; unsigned int i; for (i = 0; i < f->num_runlists; ++i) { diff --git a/drivers/gpu/nvgpu/common/vgpu/fifo/runlist_vgpu.c b/drivers/gpu/nvgpu/common/vgpu/fifo/runlist_vgpu.c index efeca45ba..cfc16ea75 100644 --- a/drivers/gpu/nvgpu/common/vgpu/fifo/runlist_vgpu.c +++ b/drivers/gpu/nvgpu/common/vgpu/fifo/runlist_vgpu.c @@ -77,7 +77,7 @@ static bool vgpu_runlist_modify_active_locked(struct gk20a *g, u32 runlist_id, struct channel_gk20a *ch, bool add) { struct fifo_gk20a *f = &g->fifo; - struct fifo_runlist_info_gk20a *runlist; + struct nvgpu_runlist_info *runlist; runlist = f->runlist_info[runlist_id]; @@ -102,7 +102,7 @@ static void vgpu_runlist_reconstruct_locked(struct gk20a *g, u32 runlist_id, bool add_entries) { struct fifo_gk20a *f = &g->fifo; - struct fifo_runlist_info_gk20a *runlist; + struct nvgpu_runlist_info *runlist; runlist = f->runlist_info[runlist_id]; @@ -132,7 +132,7 @@ static int vgpu_runlist_update_locked(struct gk20a *g, u32 runlist_id, bool wait_for_finish) { struct fifo_gk20a *f = &g->fifo; - struct fifo_runlist_info_gk20a *runlist; + struct nvgpu_runlist_info *runlist; bool add_entries; nvgpu_log_fn(g, " "); @@ -167,7 +167,7 @@ static int vgpu_runlist_update(struct gk20a *g, u32 runlist_id, struct channel_gk20a *ch, bool add, bool wait_for_finish) { - struct fifo_runlist_info_gk20a *runlist = NULL; + struct nvgpu_runlist_info *runlist = NULL; struct fifo_gk20a *f = &g->fifo; u32 ret = 0; diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h index 43713da05..49c10661e 100644 --- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h @@ -28,14 +28,13 @@ #include #include #include +#include struct gk20a_debug_output; struct nvgpu_semaphore; struct channel_gk20a; struct tsg_gk20a; -#define MAX_RUNLIST_BUFFERS 2U - #define FIFO_INVAL_ENGINE_ID (~U32(0U)) #define FIFO_INVAL_MMU_ID (~U32(0U)) #define FIFO_INVAL_CHANNEL_ID (~U32(0U)) @@ -52,29 +51,8 @@ struct tsg_gk20a; #define FIFO_PROFILING_ENTRIES 16384U #endif -#define RUNLIST_DISABLED 0U -#define RUNLIST_ENABLED 1U - /* generally corresponds to the "pbdma" engine */ -struct fifo_runlist_info_gk20a { - u32 runlist_id; - unsigned long *active_channels; - unsigned long *active_tsgs; - /* Each engine has its own SW and HW runlist buffer.*/ - struct nvgpu_mem mem[MAX_RUNLIST_BUFFERS]; - u32 cur_buffer; - u32 total_entries; - u32 pbdma_bitmask; /* pbdmas supported for this runlist*/ - u32 eng_bitmask; /* engines using this runlist */ - u32 reset_eng_bitmask; /* engines to be reset during recovery */ - u32 count; /* cached hw_submit parameter */ - bool stopped; - bool support_tsg; - /* protect ch/tsg/runlist preempt & runlist update */ - struct nvgpu_mutex runlist_lock; -}; - struct fifo_pbdma_exception_info_gk20a { u32 status_r; /* raw register value from hardware */ u32 id, next_id; @@ -137,11 +115,11 @@ struct fifo_gk20a { * If a runlist is active, then runlist_info[runlist_id] points * to one entry in active_runlist_info. Otherwise, it is NULL. */ - struct fifo_runlist_info_gk20a **runlist_info; + struct nvgpu_runlist_info **runlist_info; u32 max_runlists; /* Array of runlists that are actually in use */ - struct fifo_runlist_info_gk20a *active_runlist_info; + struct nvgpu_runlist_info *active_runlist_info; u32 num_runlists; /* number of active runlists */ #ifdef CONFIG_DEBUG_FS struct { diff --git a/drivers/gpu/nvgpu/hal/fifo/preempt_gv11b.c b/drivers/gpu/nvgpu/hal/fifo/preempt_gv11b.c index efcc226e9..213dd82ce 100644 --- a/drivers/gpu/nvgpu/hal/fifo/preempt_gv11b.c +++ b/drivers/gpu/nvgpu/hal/fifo/preempt_gv11b.c @@ -84,7 +84,7 @@ static int gv11b_fifo_preempt_locked(struct gk20a *g, u32 id, void gv11b_fifo_preempt_runlists_for_rc(struct gk20a *g, u32 runlists_mask) { struct fifo_gk20a *f = &g->fifo; - struct fifo_runlist_info_gk20a *runlist; + struct nvgpu_runlist_info *runlist; u32 token = PMU_INVALID_MUTEX_OWNER_ID; int mutex_ret = 0; u32 i; diff --git a/drivers/gpu/nvgpu/hal/fifo/runlist_fifo_gk20a.c b/drivers/gpu/nvgpu/hal/fifo/runlist_fifo_gk20a.c index 3d2be3f9c..1d300916b 100644 --- a/drivers/gpu/nvgpu/hal/fifo/runlist_fifo_gk20a.c +++ b/drivers/gpu/nvgpu/hal/fifo/runlist_fifo_gk20a.c @@ -52,8 +52,8 @@ u32 gk20a_runlist_length_max(struct gk20a *g) void gk20a_runlist_hw_submit(struct gk20a *g, u32 runlist_id, u32 count, u32 buffer_index) { - struct fifo_runlist_info_gk20a *runlist = NULL; - u64 runlist_iova; + struct nvgpu_runlist_info *runlist = NULL; + u64 runlist_iova; runlist = g->fifo.runlist_info[runlist_id]; runlist_iova = nvgpu_mem_get_addr(g, &runlist->mem[buffer_index]); @@ -140,7 +140,7 @@ int gk20a_fifo_reschedule_preempt_next(struct channel_gk20a *ch, bool wait_preempt) { struct gk20a *g = ch->g; - struct fifo_runlist_info_gk20a *runlist = + struct nvgpu_runlist_info *runlist = g->fifo.runlist_info[ch->runlist_id]; int ret = 0; u32 gr_eng_id = 0; diff --git a/drivers/gpu/nvgpu/hal/fifo/runlist_fifo_tu104.c b/drivers/gpu/nvgpu/hal/fifo/runlist_fifo_tu104.c index 53c394520..3e93fe4ed 100644 --- a/drivers/gpu/nvgpu/hal/fifo/runlist_fifo_tu104.c +++ b/drivers/gpu/nvgpu/hal/fifo/runlist_fifo_tu104.c @@ -36,7 +36,7 @@ u32 tu104_runlist_count_max(void) void tu104_runlist_hw_submit(struct gk20a *g, u32 runlist_id, u32 count, u32 buffer_index) { - struct fifo_runlist_info_gk20a *runlist = NULL; + struct nvgpu_runlist_info *runlist = NULL; u64 runlist_iova; u32 runlist_iova_lo, runlist_iova_hi; diff --git a/drivers/gpu/nvgpu/hal/rc/rc_gv11b.c b/drivers/gpu/nvgpu/hal/rc/rc_gv11b.c index 1f75c65a5..4a1d17a95 100644 --- a/drivers/gpu/nvgpu/hal/rc/rc_gv11b.c +++ b/drivers/gpu/nvgpu/hal/rc/rc_gv11b.c @@ -49,7 +49,7 @@ static void gv11b_fifo_locked_abort_runlist_active_tsgs(struct gk20a *g, struct fifo_gk20a *f = &g->fifo; struct tsg_gk20a *tsg = NULL; unsigned long tsgid; - struct fifo_runlist_info_gk20a *runlist = NULL; + struct nvgpu_runlist_info *runlist = NULL; u32 token = PMU_INVALID_MUTEX_OWNER_ID; int mutex_ret = 0; int err; @@ -135,7 +135,7 @@ void gv11b_fifo_recover(struct gk20a *g, u32 act_eng_bitmask, unsigned long bit; unsigned long bitmask; u32 pbdma_bitmask = 0U; - struct fifo_runlist_info_gk20a *runlist = NULL; + struct nvgpu_runlist_info *runlist = NULL; u32 engine_id; u32 client_type = ~U32(0U); struct fifo_gk20a *f = &g->fifo; diff --git a/drivers/gpu/nvgpu/include/nvgpu/runlist.h b/drivers/gpu/nvgpu/include/nvgpu/runlist.h index f859bacb6..f5d862c2b 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/runlist.h +++ b/drivers/gpu/nvgpu/include/nvgpu/runlist.h @@ -24,9 +24,10 @@ #define NVGPU_RUNLIST_H #include +#include +#include struct gk20a; -struct fifo_runlist_info_gk20a; struct tsg_gk20a; struct fifo_gk20a; struct channel_gk20a; @@ -39,8 +40,32 @@ struct channel_gk20a; #define RUNLIST_APPEND_FAILURE U32_MAX #define RUNLIST_INVALID_ID U32_MAX +#define RUNLIST_DISABLED 0U +#define RUNLIST_ENABLED 1U + +#define MAX_RUNLIST_BUFFERS 2U + +struct nvgpu_runlist_info { + u32 runlist_id; + unsigned long *active_channels; + unsigned long *active_tsgs; + /* Each engine has its own SW and HW runlist buffer.*/ + struct nvgpu_mem mem[MAX_RUNLIST_BUFFERS]; + u32 cur_buffer; + u32 total_entries; + u32 pbdma_bitmask; /* pbdmas supported for this runlist*/ + u32 eng_bitmask; /* engines using this runlist */ + u32 reset_eng_bitmask; /* engines to be reset during recovery */ + u32 count; /* cached hw_submit parameter */ + bool stopped; + bool support_tsg; + /* protect ch/tsg/runlist preempt & runlist update */ + struct nvgpu_mutex runlist_lock; +}; + + u32 nvgpu_runlist_construct_locked(struct fifo_gk20a *f, - struct fifo_runlist_info_gk20a *runlist, + struct nvgpu_runlist_info *runlist, u32 buf_id, u32 max_entries); int nvgpu_runlist_update_locked(struct gk20a *g, u32 runlist_id, diff --git a/drivers/gpu/nvgpu/os/linux/debug_fifo.c b/drivers/gpu/nvgpu/os/linux/debug_fifo.c index 2f0de0031..dfe0e4d4b 100644 --- a/drivers/gpu/nvgpu/os/linux/debug_fifo.c +++ b/drivers/gpu/nvgpu/os/linux/debug_fifo.c @@ -65,7 +65,7 @@ static int gk20a_fifo_sched_debugfs_seq_show( struct tsg_gk20a *tsg = NULL; struct fifo_engine_info_gk20a *engine_info; - struct fifo_runlist_info_gk20a *runlist; + struct nvgpu_runlist_info *runlist; u32 runlist_id; int ret = SEQ_SKIP; u32 engine_id; diff --git a/userspace/units/fifo/runlist/nvgpu-runlist.c b/userspace/units/fifo/runlist/nvgpu-runlist.c index 110549d29..46b41c0be 100644 --- a/userspace/units/fifo/runlist/nvgpu-runlist.c +++ b/userspace/units/fifo/runlist/nvgpu-runlist.c @@ -36,11 +36,11 @@ static void setup_fifo(struct gk20a *g, unsigned long *tsg_map, unsigned long *ch_map, struct tsg_gk20a *tsgs, struct channel_gk20a *chs, unsigned int num_tsgs, unsigned int num_channels, - struct fifo_runlist_info_gk20a **runlists, u32 *rl_data, + struct nvgpu_runlist_info **runlists, u32 *rl_data, bool interleave) { struct fifo_gk20a *f = &g->fifo; - struct fifo_runlist_info_gk20a *runlist = runlists[0]; + struct nvgpu_runlist_info *runlist = runlists[0]; /* we only use the runlist 0 here */ runlist->mem[0].cpu_va = rl_data; @@ -173,8 +173,8 @@ static int test_tsg_format_gen(struct unit_module *m, struct gk20a *g, void *args) { struct fifo_gk20a *f = &g->fifo; - struct fifo_runlist_info_gk20a runlist; - struct fifo_runlist_info_gk20a *runlists = &runlist; + struct nvgpu_runlist_info runlist; + struct nvgpu_runlist_info *runlists = &runlist; unsigned long active_tsgs_map = 0; unsigned long active_chs_map = 0; struct tsg_gk20a tsgs[1] = {{0}}; @@ -237,8 +237,8 @@ static int test_common_gen(struct unit_module *m, struct gk20a *g, u32 *expected, u32 expect_count) { struct fifo_gk20a *f = &g->fifo; - struct fifo_runlist_info_gk20a runlist; - struct fifo_runlist_info_gk20a *runlists = &runlist; + struct nvgpu_runlist_info runlist; + struct nvgpu_runlist_info *runlists = &runlist; unsigned long active_tsgs_map = 0; unsigned long active_chs_map = 0; struct tsg_gk20a tsgs[6] = {{0}};