gpu: nvgpu: Rework engine management to work with vGPU

Currently the vGPU engine management rewrites a lot of the common
device agnostic engine management code.

With the new top HAL parsing one device at a time, it is now more
easily possible to tie the vGPU into the new common device framework
by implementing the top HAL but with the vGPU engine list backend.

This lets the vGPU inherit all the common engine and device
management code. By doing so the vGPU HAL need only implement a
trivial and simple HAL.

This also gets us a step closer to merging all of the CE init
code: logically it just iterates through all CE engines whatever
they may be. The only reason this differs between chips is because
of the swap from CE0-2 to LCEs in the Pascal generation. This could
be abstracted by the unit code easily enough.

Also, the pbdma_id for each engine has to be added to the device
struct. Eventually this was going to happen anyway, since the
device struct will soon replace the nvgpu_engine_info struct.
It's a little bit of an abuse but might be worth it long term. If
not, it should not be difficult to replace uses of dev->pbdma_id
with a proper lookup of PBDMA ID based on the device info.

JIRA NVGPU-5421

Change-Id: Ie8dcd3b0150184d58ca0f78940c2e7ca72994e64
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2351877
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>

drivers/gpu/nvgpu/include/nvgpu/device.h

@@ -141,6 +141,17 @@ struct nvgpu_device {
 	 */
 	u32 reset_id;
 
+	/**
+	 * PBDMA ID for this device. Technically not part of the dev_top array,
+	 * but it's computable from various registers when the other device info
+	 * is read.
+	 *
+	 * This also makes the vGPU support a little easier as this field gets
+	 * passed to the vGPU client in the same data structure as the rest of the
+	 * device info.
+	 */
+	u32 pbdma_id;
+
 	/** @cond DOXYGEN_SHOULD_SKIP_THIS */
 #if defined(CONFIG_NVGPU_NON_FUSA) && defined(CONFIG_NVGPU_NEXT)
 	/* nvgpu next device info additions */

drivers/gpu/nvgpu/include/nvgpu/gops_engine.h

@@ -76,7 +76,6 @@ struct gops_engine {
 
 	bool (*is_fault_engine_subid_gpc)(struct gk20a *g,
 				 u32 engine_subid);
-	int (*init_info)(struct nvgpu_fifo *f);
 	int (*init_ce_info)(struct nvgpu_fifo *f);
 };
 /** @endcond DOXYGEN_SHOULD_SKIP_THIS */