gpu: nvgpu: Add os specific call to initialize the channels

Add OS specific function to return the number of syncpoints
available to the GPU. This is required for making the
syncpoints as configurable.

Linux: The default number of syncpoints is 512.

Bug 3644504

Change-Id: Iddbc38cb25480876d6d8f39f039218a1b2b22605
Signed-off-by: Dinesh T <dt@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2820152
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
This commit is contained in:
Dinesh T
2022-12-01 21:05:44 +00:00
committed by mobile promotions
parent 8e60795b9c
commit 373398a46b
4 changed files with 40 additions and 7 deletions

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@@ -30,6 +30,7 @@
#include <nvgpu/bug.h> #include <nvgpu/bug.h>
#include <nvgpu/string.h> #include <nvgpu/string.h>
#include <nvgpu/kmem.h> #include <nvgpu/kmem.h>
#include <nvgpu/channel_sync.h>
#include <nvgpu/log2.h> #include <nvgpu/log2.h>
#include <nvgpu/static_analysis.h> #include <nvgpu/static_analysis.h>
@@ -37,24 +38,22 @@
#include "channel_ga10b.h" #include "channel_ga10b.h"
#include <nvgpu/hw/ga10b/hw_runlist_ga10b.h> #include <nvgpu/hw/ga10b/hw_runlist_ga10b.h>
#ifdef CONFIG_NVGPU_HAL_NON_FUSA
#define NUM_CHANNELS 512U
#else
#define NUM_CHANNELS 128U
#endif
#define CHANNEL_BOUND 1 #define CHANNEL_BOUND 1
#define CHANNEL_UNBOUND 0 #define CHANNEL_UNBOUND 0
u32 ga10b_channel_count(struct gk20a *g) u32 ga10b_channel_count(struct gk20a *g)
{ {
u32 num_channels = 0U;
/* Limit number of channels, avoids unnecessary memory allocation */ /* Limit number of channels, avoids unnecessary memory allocation */
nvgpu_log(g, gpu_dbg_info, "Number of channels supported by hw = %u", nvgpu_log(g, gpu_dbg_info, "Number of channels supported by hw = %u",
((0x1U) << runlist_channel_config_num_channels_log2_2k_v())); ((0x1U) << runlist_channel_config_num_channels_log2_2k_v()));
num_channels = nvgpu_channel_get_synpoints(g);
nvgpu_log(g, gpu_dbg_info, "Number of channels supported by sw = %u", nvgpu_log(g, gpu_dbg_info, "Number of channels supported by sw = %u",
NUM_CHANNELS); num_channels);
return NUM_CHANNELS; return num_channels;
} }
void ga10b_channel_enable(struct nvgpu_channel *ch) void ga10b_channel_enable(struct nvgpu_channel *ch)

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@@ -134,4 +134,17 @@ bool nvgpu_channel_sync_needs_os_fence_framework(struct gk20a *g);
#endif /* CONFIG_NVGPU_KERNEL_MODE_SUBMIT */ #endif /* CONFIG_NVGPU_KERNEL_MODE_SUBMIT */
/**
* @brief Get the number of supported syncpoints.
*
* @param g [in] Pointer to GPU
*
* This function is required to initialize the supported channels
* as there is a one to one relationship between channel and syncpoint.
* Currently nvgpu assigns a sync-point to each allocated channel,
* thus we can only support as many channels as there are sync-points.
*
* @return Number of supported syncpoints.
*/
u32 nvgpu_channel_get_synpoints(struct gk20a *g);
#endif /* NVGPU_CHANNEL_SYNC_H */ #endif /* NVGPU_CHANNEL_SYNC_H */

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@@ -21,6 +21,7 @@
#include <nvgpu/os_sched.h> #include <nvgpu/os_sched.h>
#include <nvgpu/gk20a.h> #include <nvgpu/gk20a.h>
#include <nvgpu/channel.h> #include <nvgpu/channel.h>
#include <nvgpu/channel_sync.h>
#include <nvgpu/dma.h> #include <nvgpu/dma.h>
#include <nvgpu/fence.h> #include <nvgpu/fence.h>
#include <nvgpu/grmgr.h> #include <nvgpu/grmgr.h>
@@ -51,6 +52,8 @@
#include "sync_sema_dma.h" #include "sync_sema_dma.h"
#include <nvgpu/linux/os_fence_dma.h> #include <nvgpu/linux/os_fence_dma.h>
#define NUM_CHANNELS 512U
u32 nvgpu_submit_gpfifo_user_flags_to_common_flags(u32 user_flags) u32 nvgpu_submit_gpfifo_user_flags_to_common_flags(u32 user_flags)
{ {
u32 flags = 0; u32 flags = 0;
@@ -653,6 +656,17 @@ u32 nvgpu_channel_get_max_subctx_count(struct nvgpu_channel *ch)
return nvgpu_grmgr_get_gpu_instance_max_veid_count(g, gpu_instance_id); return nvgpu_grmgr_get_gpu_instance_max_veid_count(g, gpu_instance_id);
} }
u32 nvgpu_channel_get_synpoints(struct gk20a *g)
{
(void)g;
/*
* The syncpoints should be queried from the DT entry.
* Once support is added in the DT, this function will
* read and return syncpoint entry present in the device tree.
*/
return NUM_CHANNELS;
}
#ifdef CONFIG_DEBUG_FS #ifdef CONFIG_DEBUG_FS
static void trace_write_pushbuffer(struct nvgpu_channel *c, static void trace_write_pushbuffer(struct nvgpu_channel *c,
struct nvgpu_gpfifo_entry *g) struct nvgpu_gpfifo_entry *g)

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@@ -21,9 +21,16 @@
*/ */
#include <nvgpu/channel.h> #include <nvgpu/channel.h>
#include <nvgpu/channel_sync.h>
u32 nvgpu_channel_get_max_subctx_count(struct nvgpu_channel *ch) u32 nvgpu_channel_get_max_subctx_count(struct nvgpu_channel *ch)
{ {
(void)ch; (void)ch;
return 64; return 64;
} }
u32 nvgpu_channel_get_synpoints(struct gk20a *g)
{
(void)g;
return 256;
}