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gpu: nvgpu: Wait for full UDE completion

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devinit signals completion even before the full UDE script has been
executed. Wait for both devinit complete & PMU halt to make sure
UDE is fully completed.

Bug 200244445

Change-Id: Iaec27d9fc312f282a778aabbbe8b75d85e7a0a87
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1242253
(cherry picked from commit a013029e48fcc83f670bfd0e82da035fa41d6030)
(cherry picked from commit e742842eb4fbcefdc5bb88b2f7b3055a1a60652b)
Reviewed-on: http://git-master/r/1263293
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
This commit is contained in:
Terje Bergstrom
2016-10-25 10:06:07 -07:00
committed by mobile promotions
parent 89e707d2b4
commit 37d4b649d4
1 changed files with 5 additions and 3 deletions
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8
drivers/gpu/nvgpu/gm206/bios_gm206.c
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@@ -704,7 +704,7 @@ static int gm206_bios_devinit(struct gk20a *g)
{
int retries = PMU_BOOT_TIMEOUT_MAX / PMU_BOOT_TIMEOUT_DEFAULT;
int err = 0;
int val;
int devinit_completed;
gk20a_dbg_fn("");
g->ops.pmu.reset(g);
@@ -752,10 +752,12 @@ static int gm206_bios_devinit(struct gk20a *g)
retries = PMU_BOOT_TIMEOUT_MAX / PMU_BOOT_TIMEOUT_DEFAULT;
do {
val = top_scratch1_devinit_completed_v(
devinit_completed = pwr_falcon_cpuctl_halt_intr_v(
gk20a_readl(g, pwr_falcon_cpuctl_r())) &&
top_scratch1_devinit_completed_v(
gk20a_readl(g, top_scratch1_r()));
udelay(PMU_BOOT_TIMEOUT_DEFAULT);
} while (!val && retries--);
} while (!devinit_completed && retries--);
gk20a_writel(g, pwr_falcon_irqsclr_r(),
pwr_falcon_irqstat_halt_true_f());