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gpu: nvgpu: Wait for full UDE completion
devinit signals completion even before the full UDE script has been executed. Wait for both devinit complete & PMU halt to make sure UDE is fully completed. Bug 200244445 Change-Id: Iaec27d9fc312f282a778aabbbe8b75d85e7a0a87 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1242253 (cherry picked from commit a013029e48fcc83f670bfd0e82da035fa41d6030) (cherry picked from commit e742842eb4fbcefdc5bb88b2f7b3055a1a60652b) Reviewed-on: http://git-master/r/1263293 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit
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@@ -704,7 +704,7 @@ static int gm206_bios_devinit(struct gk20a *g)
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{
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{
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int retries = PMU_BOOT_TIMEOUT_MAX / PMU_BOOT_TIMEOUT_DEFAULT;
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int retries = PMU_BOOT_TIMEOUT_MAX / PMU_BOOT_TIMEOUT_DEFAULT;
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int err = 0;
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int err = 0;
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int val;
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int devinit_completed;
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gk20a_dbg_fn("");
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gk20a_dbg_fn("");
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g->ops.pmu.reset(g);
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g->ops.pmu.reset(g);
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@@ -752,10 +752,12 @@ static int gm206_bios_devinit(struct gk20a *g)
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retries = PMU_BOOT_TIMEOUT_MAX / PMU_BOOT_TIMEOUT_DEFAULT;
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retries = PMU_BOOT_TIMEOUT_MAX / PMU_BOOT_TIMEOUT_DEFAULT;
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do {
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do {
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val = top_scratch1_devinit_completed_v(
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devinit_completed = pwr_falcon_cpuctl_halt_intr_v(
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gk20a_readl(g, pwr_falcon_cpuctl_r())) &&
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top_scratch1_devinit_completed_v(
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gk20a_readl(g, top_scratch1_r()));
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gk20a_readl(g, top_scratch1_r()));
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udelay(PMU_BOOT_TIMEOUT_DEFAULT);
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udelay(PMU_BOOT_TIMEOUT_DEFAULT);
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} while (!val && retries--);
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} while (!devinit_completed && retries--);
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gk20a_writel(g, pwr_falcon_irqsclr_r(),
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gk20a_writel(g, pwr_falcon_irqsclr_r(),
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pwr_falcon_irqstat_halt_true_f());
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pwr_falcon_irqstat_halt_true_f());
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