From 399a8f3125451b0518bdcf3c41e70981a031cdaf Mon Sep 17 00:00:00 2001 From: Vedashree Vidwans Date: Tue, 17 Dec 2019 14:53:07 -0800 Subject: [PATCH] gpu: nvgpu: unit: nvgpu.hal.fifo.ctxsw_timeout UT This unit test covers most of the nvgpu.hal.fifo.ctxsw_timeout module lines and all branches. Jira NVGPU-4388 Change-Id: I3b3855e6710073c1f878a2f7155a975373094da1 Signed-off-by: Vedashree Vidwans Reviewed-on: https://git-master.nvidia.com/r/2264345 Reviewed-by: mobile promotions Tested-by: mobile promotions --- Makefile.umbrella.tmk | 1 + .../nvgpu/hal/fifo/ctxsw_timeout_gv11b_fusa.c | 1 + drivers/gpu/nvgpu/libnvgpu-drv_safe.export | 2 + userspace/Makefile.sources | 1 + userspace/SWUTS.h | 1 + userspace/SWUTS.sources | 1 + userspace/required_tests.json | 24 ++ .../units/fifo/ctxsw_timeout/gv11b/Makefile | 32 +++ .../gv11b/Makefile.interface.tmk | 35 +++ .../fifo/ctxsw_timeout/gv11b/Makefile.tmk | 40 +++ .../gv11b/nvgpu-ctxsw-timeout-gv11b.c | 266 ++++++++++++++++++ .../gv11b/nvgpu-ctxsw-timeout-gv11b.h | 83 ++++++ 12 files changed, 487 insertions(+) create mode 100644 userspace/units/fifo/ctxsw_timeout/gv11b/Makefile create mode 100644 userspace/units/fifo/ctxsw_timeout/gv11b/Makefile.interface.tmk create mode 100644 userspace/units/fifo/ctxsw_timeout/gv11b/Makefile.tmk create mode 100644 userspace/units/fifo/ctxsw_timeout/gv11b/nvgpu-ctxsw-timeout-gv11b.c create mode 100644 userspace/units/fifo/ctxsw_timeout/gv11b/nvgpu-ctxsw-timeout-gv11b.h diff --git a/Makefile.umbrella.tmk b/Makefile.umbrella.tmk index ca37c0b59..0fe0c40cf 100644 --- a/Makefile.umbrella.tmk +++ b/Makefile.umbrella.tmk @@ -86,6 +86,7 @@ NV_REPOSITORY_COMPONENTS += userspace/units/fifo/channel NV_REPOSITORY_COMPONENTS += userspace/units/fifo/channel/gk20a NV_REPOSITORY_COMPONENTS += userspace/units/fifo/channel/gm20b NV_REPOSITORY_COMPONENTS += userspace/units/fifo/channel/gv11b +NV_REPOSITORY_COMPONENTS += userspace/units/fifo/ctxsw_timeout/gv11b NV_REPOSITORY_COMPONENTS += userspace/units/fifo/engine NV_REPOSITORY_COMPONENTS += userspace/units/fifo/engine/gm20b NV_REPOSITORY_COMPONENTS += userspace/units/fifo/engine/gp10b diff --git a/drivers/gpu/nvgpu/hal/fifo/ctxsw_timeout_gv11b_fusa.c b/drivers/gpu/nvgpu/hal/fifo/ctxsw_timeout_gv11b_fusa.c index b82e92053..8c8b25e95 100644 --- a/drivers/gpu/nvgpu/hal/fifo/ctxsw_timeout_gv11b_fusa.c +++ b/drivers/gpu/nvgpu/hal/fifo/ctxsw_timeout_gv11b_fusa.c @@ -61,6 +61,7 @@ void gv11b_fifo_ctxsw_timeout_enable(struct gk20a *g, bool enable) nvgpu_log_info(g, "new fifo_eng_ctxsw_timeout reg val = 0x%08x", timeout); + nvgpu_writel(g, fifo_eng_ctxsw_timeout_r(), timeout); } } else { diff --git a/drivers/gpu/nvgpu/libnvgpu-drv_safe.export b/drivers/gpu/nvgpu/libnvgpu-drv_safe.export index fdb618f10..93aaab25b 100644 --- a/drivers/gpu/nvgpu/libnvgpu-drv_safe.export +++ b/drivers/gpu/nvgpu/libnvgpu-drv_safe.export @@ -141,6 +141,8 @@ gv11b_fb_read_mmu_fault_status gv11b_fb_write_mmu_fault_buffer_lo_hi gv11b_fb_write_mmu_fault_buffer_size gv11b_fb_write_mmu_fault_status +gv11b_fifo_ctxsw_timeout_enable +gv11b_fifo_handle_ctxsw_timeout gv11b_fifo_handle_sched_error gv11b_fifo_intr_0_enable gv11b_fifo_intr_0_isr diff --git a/userspace/Makefile.sources b/userspace/Makefile.sources index 36258c67b..813c12531 100644 --- a/userspace/Makefile.sources +++ b/userspace/Makefile.sources @@ -97,6 +97,7 @@ UNITS := \ $(UNIT_SRC)/fifo/channel/gk20a \ $(UNIT_SRC)/fifo/channel/gm20b \ $(UNIT_SRC)/fifo/channel/gv11b \ + $(UNIT_SRC)/fifo/ctxsw_timeout/gv11b \ $(UNIT_SRC)/fifo/engine \ $(UNIT_SRC)/fifo/engine/gm20b \ $(UNIT_SRC)/fifo/engine/gp10b \ diff --git a/userspace/SWUTS.h b/userspace/SWUTS.h index 43a72a828..56553466b 100644 --- a/userspace/SWUTS.h +++ b/userspace/SWUTS.h @@ -42,6 +42,7 @@ * - @ref SWUTS-fifo-channel-gk20a * - @ref SWUTS-fifo-channel-gm20b * - @ref SWUTS-fifo-channel-gv11b + * - @ref SWUTS-fifo-ctxsw_timeout-gv11b * - @ref SWUTS-fifo-engine * - @ref SWUTS-fifo-engine-gm20b * - @ref SWUTS-fifo-engine-gp10b diff --git a/userspace/SWUTS.sources b/userspace/SWUTS.sources index 8b72f2135..82336ca48 100644 --- a/userspace/SWUTS.sources +++ b/userspace/SWUTS.sources @@ -14,6 +14,7 @@ INPUT += ../../../userspace/units/fifo/channel/nvgpu-channel.h INPUT += ../../../userspace/units/fifo/channel/gk20a/nvgpu-channel-gk20a.h INPUT += ../../../userspace/units/fifo/channel/gm20b/nvgpu-channel-gm20b.h INPUT += ../../../userspace/units/fifo/channel/gv11b/nvgpu-channel-gv11b.h +INPUT += ../../../userspace/units/fifo/ctxsw_timeout/gv11b/nvgpu-ctxsw-timeout-gv11b.h INPUT += ../../../userspace/units/fifo/engine/nvgpu-engine.h INPUT += ../../../userspace/units/fifo/engine/gm20b/nvgpu-engine-gm20b.h INPUT += ../../../userspace/units/fifo/engine/gp10b/nvgpu-engine-gp10b.h diff --git a/userspace/required_tests.json b/userspace/required_tests.json index 1cacf2d85..31896c499 100644 --- a/userspace/required_tests.json +++ b/userspace/required_tests.json @@ -2237,6 +2237,30 @@ "unit": "nvgpu_channel_gv11b", "test_level": 0 }, + { + "test": "test_gv11b_fifo_ctxsw_timeout_enable", + "case": "ctxsw_timeout_enable", + "unit": "nvgpu_ctxsw_timeout_gv11b", + "test_level": 0 + }, + { + "test": "test_gv11b_fifo_handle_ctxsw_timeout", + "case": "handle_ctxsw_timeout", + "unit": "nvgpu_ctxsw_timeout_gv11b", + "test_level": 0 + }, + { + "test": "test_fifo_init_support", + "case": "init_support", + "unit": "nvgpu_ctxsw_timeout_gv11b", + "test_level": 0 + }, + { + "test": "test_fifo_remove_support", + "case": "remove_support", + "unit": "nvgpu_ctxsw_timeout_gv11b", + "test_level": 0 + }, { "test": "test_engine_enum_from_type", "case": "enum_from_type", diff --git a/userspace/units/fifo/ctxsw_timeout/gv11b/Makefile b/userspace/units/fifo/ctxsw_timeout/gv11b/Makefile new file mode 100644 index 000000000..a84f552f3 --- /dev/null +++ b/userspace/units/fifo/ctxsw_timeout/gv11b/Makefile @@ -0,0 +1,32 @@ +# Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. +# +# Permission is hereby granted, free of charge, to any person obtaining a +# copy of this software and associated documentation files (the "Software"), +# to deal in the Software without restriction, including without limitation +# the rights to use, copy, modify, merge, publish, distribute, sublicense, +# and/or sell copies of the Software, and to permit persons to whom the +# Software is furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included in +# all copies or substantial portions of the Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER +# DEALINGS IN THE SOFTWARE. + +.SUFFIXES: + +OBJS = nvgpu-ctxsw-timeout-gv11b.o +MODULE = nvgpu-ctxsw-timeout-gv11b + +LIB_PATHS += -lnvgpu-fifo-common +include ../../../Makefile.units + +lib$(MODULE).so: fifo + +fifo: + $(MAKE) -C ../.. diff --git a/userspace/units/fifo/ctxsw_timeout/gv11b/Makefile.interface.tmk b/userspace/units/fifo/ctxsw_timeout/gv11b/Makefile.interface.tmk new file mode 100644 index 000000000..5aa05252f --- /dev/null +++ b/userspace/units/fifo/ctxsw_timeout/gv11b/Makefile.interface.tmk @@ -0,0 +1,35 @@ +################################### tell Emacs this is a -*- makefile-gmake -*- +# +# Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. +# +# Permission is hereby granted, free of charge, to any person obtaining a +# copy of this software and associated documentation files (the "Software"), +# to deal in the Software without restriction, including without limitation +# the rights to use, copy, modify, merge, publish, distribute, sublicense, +# and/or sell copies of the Software, and to permit persons to whom the +# Software is furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included in +# all copies or substantial portions of the Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER +# DEALINGS IN THE SOFTWARE. +# +# tmake for SW Mobile component makefile +# +############################################################################### + +NVGPU_UNIT_NAME=nvgpu-ctxsw-timeout-gv11b + +include $(NV_SOURCE)/kernel/nvgpu/userspace/units/Makefile.units.common.interface.tmk + +# Local Variables: +# indent-tabs-mode: t +# tab-width: 8 +# End: +# vi: set tabstop=8 noexpandtab: diff --git a/userspace/units/fifo/ctxsw_timeout/gv11b/Makefile.tmk b/userspace/units/fifo/ctxsw_timeout/gv11b/Makefile.tmk new file mode 100644 index 000000000..6dec09bc2 --- /dev/null +++ b/userspace/units/fifo/ctxsw_timeout/gv11b/Makefile.tmk @@ -0,0 +1,40 @@ +################################### tell Emacs this is a -*- makefile-gmake -*- +# +# Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. +# +# Permission is hereby granted, free of charge, to any person obtaining a +# copy of this software and associated documentation files (the "Software"), +# to deal in the Software without restriction, including without limitation +# the rights to use, copy, modify, merge, publish, distribute, sublicense, +# and/or sell copies of the Software, and to permit persons to whom the +# Software is furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included in +# all copies or substantial portions of the Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER +# DEALINGS IN THE SOFTWARE. +# +# tmake for SW Mobile component makefile +# +############################################################################### + +NVGPU_UNIT_NAME = nvgpu-ctxsw-timeout-gv11b +NVGPU_UNIT_SRCS = nvgpu-ctxsw-timeout-gv11b.c + +NVGPU_UNIT_INTERFACE_DIRS := \ + $(NV_SOURCE)/kernel/nvgpu/userspace/units/fifo \ + $(NV_SOURCE)/kernel/nvgpu/drivers/gpu/nvgpu + +include $(NV_SOURCE)/kernel/nvgpu/userspace/units/Makefile.units.common.tmk + +# Local Variables: +# indent-tabs-mode: t +# tab-width: 8 +# End: +# vi: set tabstop=8 noexpandtab: diff --git a/userspace/units/fifo/ctxsw_timeout/gv11b/nvgpu-ctxsw-timeout-gv11b.c b/userspace/units/fifo/ctxsw_timeout/gv11b/nvgpu-ctxsw-timeout-gv11b.c new file mode 100644 index 000000000..2fb991340 --- /dev/null +++ b/userspace/units/fifo/ctxsw_timeout/gv11b/nvgpu-ctxsw-timeout-gv11b.c @@ -0,0 +1,266 @@ +/* + * Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#include +#include +#include + +#include +#include + +#include +#include +#include + +#include +#include +#include +#include + +#include "hal/init/hal_gv11b.h" + +#include "os/posix/os_posix.h" + +#include + +#include + +#include "../../nvgpu-fifo-common.h" +#include "nvgpu-ctxsw-timeout-gv11b.h" + +#ifdef CTXSW_TIMEOUT_GV11B_UNIT_DEBUG +#undef unit_verbose +#define unit_verbose unit_info +#else +#define unit_verbose(unit, msg, ...) \ + do { \ + if (0) { \ + unit_info(unit, msg, ##__VA_ARGS__); \ + } \ + } while (0) +#endif + +#define branches_str test_fifo_flags_str +#define pruned test_fifo_subtest_pruned + +struct unit_ctx { + struct unit_module *m; + u32 timeout_info; + +}; +struct unit_ctx u; + +#define F_CTXSW_TIMEOUT_ENABLE BIT(0) +#define F_CTXSW_TIMEOUT_PLATFORM_SILICON BIT(1) +#define F_CTXSW_TIMEOUT_ENABLE_LAST BIT(2) + +static const char *f_ctxsw_timeout_enable[] = { + "timeout_enable", + "platform_is_silicon", +}; + +int test_gv11b_fifo_ctxsw_timeout_enable(struct unit_module *m, + struct gk20a *g, void *args) +{ + int ret = UNIT_FAIL; + u32 branches; + bool enable; + u32 timeout; + struct nvgpu_os_posix *p = nvgpu_os_posix_from_gk20a(g); + + g->ptimer_src_freq = PTIMER_REF_FREQ_HZ; + g->ctxsw_timeout_period_ms = 100U; + + for (branches = 0; branches < F_CTXSW_TIMEOUT_ENABLE_LAST; branches++) { + + unit_verbose(m, "%s branches=%s\n", __func__, + branches_str(branches, f_ctxsw_timeout_enable)); + + enable = branches & F_CTXSW_TIMEOUT_ENABLE ? true : false; + p->is_silicon = branches & F_CTXSW_TIMEOUT_PLATFORM_SILICON ? + true : false; + + gv11b_fifo_ctxsw_timeout_enable(g, enable); + + timeout = nvgpu_readl(g, fifo_eng_ctxsw_timeout_r()); + + if (!(branches & F_CTXSW_TIMEOUT_ENABLE)) { + unit_assert((timeout & + fifo_eng_ctxsw_timeout_detection_m()) == + fifo_eng_ctxsw_timeout_detection_disabled_f(), + goto done); + } else if (branches & F_CTXSW_TIMEOUT_PLATFORM_SILICON) { + unit_assert((timeout & + fifo_eng_ctxsw_timeout_detection_m()) == + fifo_eng_ctxsw_timeout_detection_enabled_f(), + goto done); + + timeout &= ~fifo_eng_ctxsw_timeout_detection_m(); + + unit_assert(timeout == (g->ctxsw_timeout_period_ms * + 1000U), goto done); + } else { + unit_assert((timeout & + fifo_eng_ctxsw_timeout_period_m()) == + fifo_eng_ctxsw_timeout_period_max_f(), + goto done); + + unit_assert((timeout & + fifo_eng_ctxsw_timeout_detection_m()) == + fifo_eng_ctxsw_timeout_detection_disabled_f(), + goto done); + } + } + + ret = UNIT_SUCCESS; +done: + if (ret != UNIT_SUCCESS) { + unit_err(m, "%s branches=%s\n", __func__, + branches_str(branches, f_ctxsw_timeout_enable)); + } + g->ptimer_src_freq = 0U; + g->ctxsw_timeout_period_ms = 0U; + return ret; +} + +static void writel_access_reg_fn(struct gk20a *g, + struct nvgpu_reg_access *access) +{ + nvgpu_posix_io_writel_reg_space(g, access->addr, access->value); +} + +static void readl_access_reg_fn(struct gk20a *g, + struct nvgpu_reg_access *access) +{ + if (access->addr == fifo_intr_ctxsw_timeout_info_r(1U)) { + access->value = u.timeout_info; + } else { + access->value = nvgpu_posix_io_readl_reg_space(g, access->addr); + } +} + +#define F_ENG_TIMEDOUT_NONE BIT(0) +#define F_CTX_STATUS_0 BIT(1) +#define F_CTX_STATUS_1 BIT(2) +#define F_CTX_STATUS_3 BIT(3) +#define F_TSGID_INVALID BIT(4) +#define F_INFO_STATUS_2 BIT(5) +#define F_INFO_STATUS_3 BIT(6) +#define F_HANDLE_CTXSW_TIMEOUT_ENABLE_LAST BIT(7) + +static const char *f_handle_timeout_enable[] = { + "no_engines_timeout_pending", + "ctx_status_is_0", + "ctx_status_is_1", + "ctx_status_is_3", + "tsgid_is_invalid", + "info_status_is_2", + "info_status_is_3", +}; + +int test_gv11b_fifo_handle_ctxsw_timeout(struct unit_module *m, + struct gk20a *g, void *args) +{ + int ret = UNIT_FAIL; + u32 branches; + u32 prune = F_ENG_TIMEDOUT_NONE | F_CTX_STATUS_3; + bool ret_bool; + u32 ctxsw_timeout_engine_orig = nvgpu_readl(g, + fifo_intr_ctxsw_timeout_r()); + u32 ctxsw_timeout_engine = 0U; + u32 timeout_info = 0U, ctx_status = 0U, tsgid = 0U, info_status = 0U; + struct nvgpu_posix_io_callbacks *old_io; + struct nvgpu_posix_io_callbacks new_io = { + .readl = readl_access_reg_fn, + .writel = writel_access_reg_fn + }; + + old_io = nvgpu_posix_register_io(g, &new_io); + u.m = m; + + for (branches = 0; branches < F_HANDLE_CTXSW_TIMEOUT_ENABLE_LAST; + branches++) { + + if (pruned(branches, prune)) { + unit_verbose(m, "%s branches=%s (pruned)\n", __func__, + branches_str(branches, + f_handle_timeout_enable)); + continue; + } + + unit_verbose(m, "%s branches=%s\n", __func__, + branches_str(branches, f_handle_timeout_enable)); + + /* Set pending timeout engines to be 0 or all except eng_id0 */ + ctxsw_timeout_engine = branches & F_ENG_TIMEDOUT_NONE ? + 0U : 0xff012ffeU; + nvgpu_writel(g, fifo_intr_ctxsw_timeout_r(), + ctxsw_timeout_engine); + + ctx_status = branches & F_CTX_STATUS_0 ? 0U : + branches & F_CTX_STATUS_1 ? 1U : 2U; + ctx_status = branches & F_CTX_STATUS_3 ? 3U : ctx_status; + tsgid = branches & F_TSGID_INVALID ? NVGPU_INVALID_TSG_ID : 0U; + info_status = branches & F_INFO_STATUS_2 ? 2U : + branches & F_INFO_STATUS_3 ? 3U : 1U; + + timeout_info = ((ctx_status & 0x3U) << 14U) | + ((info_status & 0x3U) << 30U); + + if (ctx_status == + fifo_intr_ctxsw_timeout_info_ctxsw_state_load_v()) { + timeout_info |= ((tsgid & 0x3fffU) << 16U); + } else { + timeout_info |= (tsgid & 0x3fffU); + } + + u.timeout_info = timeout_info; + + ret_bool = gv11b_fifo_handle_ctxsw_timeout(g); + + unit_assert(ret_bool == false, goto done); + unit_assert(ctxsw_timeout_engine == nvgpu_readl(g, + fifo_intr_ctxsw_timeout_r()), goto done); + + nvgpu_writel(g, fifo_intr_ctxsw_timeout_r(), + ctxsw_timeout_engine_orig); + } + + ret = UNIT_SUCCESS; +done: + if (ret != UNIT_SUCCESS) { + unit_err(m, "%s branches=%s\n", __func__, + branches_str(branches, f_handle_timeout_enable)); + } + (void) nvgpu_posix_register_io(g, old_io); + + return ret; +} + +struct unit_module_test nvgpu_ctxsw_timeout_gv11b_tests[] = { + UNIT_TEST(init_support, test_fifo_init_support, NULL, 0), + UNIT_TEST(ctxsw_timeout_enable, test_gv11b_fifo_ctxsw_timeout_enable, NULL, 0), + UNIT_TEST(handle_ctxsw_timeout, test_gv11b_fifo_handle_ctxsw_timeout, NULL, 0), + UNIT_TEST(remove_support, test_fifo_remove_support, NULL, 0), +}; + +UNIT_MODULE(nvgpu_ctxsw_timeout_gv11b, nvgpu_ctxsw_timeout_gv11b_tests, UNIT_PRIO_NVGPU_TEST); diff --git a/userspace/units/fifo/ctxsw_timeout/gv11b/nvgpu-ctxsw-timeout-gv11b.h b/userspace/units/fifo/ctxsw_timeout/gv11b/nvgpu-ctxsw-timeout-gv11b.h new file mode 100644 index 000000000..28c1486ea --- /dev/null +++ b/userspace/units/fifo/ctxsw_timeout/gv11b/nvgpu-ctxsw-timeout-gv11b.h @@ -0,0 +1,83 @@ +/* + * Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ +#ifndef UNIT_NVGPU_CTXSW_TIMEOUT_GV11B_H +#define UNIT_NVGPU_CTXSW_TIMEOUT_GV11B_H + +#include + +struct unit_module; +struct gk20a; + +/** @addtogroup SWUTS-fifo-ctxsw_timeout-gv11b + * @{ + * + * Software Unit Test Specification for fifo/ctxsw_timeout/gv11b + */ + +/** + * Test specification for: test_gv11b_fifo_ctxsw_timeout_enable + * + * Description: Test ctxsw timeout enable/disable. + * + * Test Type: Feature based + * + * Targets: gv11b_fifo_ctxsw_timeout_enable + * + * Input: test_fifo_init_support() run for this GPU + * + * Steps: + * - Calculate ctxsw timout value and store. + * - Set MSB bit to enable timeout and reset to disable it. + * - Check if timeout value saved is correct. + * + * Output: Returns PASS if all branches gave expected results. FAIL otherwise. + */ +int test_gv11b_fifo_ctxsw_timeout_enable(struct unit_module *m, + struct gk20a *g, void *args); + +/** + * Test specification for: test_gv11b_fifo_handle_ctxsw_timeout + * + * Description: Test ctxsw + * + * Test Type: Feature based + * + * Targets: gv11b_fifo_handle_ctxsw_timeout, gv11b_fifo_ctxsw_timeout_info + * + * Input: test_fifo_init_support() run for this GPU + * + * Steps: + * - Go through engines list to find out which engines are pending. + * - Figure out tsgid from ctx_status and info_status. + * - Clear interrupts by writing 1 to corresponding engine id. + * - Check that the timeout clear interrupts value written to memory is correct. + * + * Output: Returns PASS if all branches gave expected results. FAIL otherwise. + */ +int test_gv11b_fifo_handle_ctxsw_timeout(struct unit_module *m, + struct gk20a *g, void *args); + +/** + * @} + */ + +#endif /* UNIT_NVGPU_CTXSW_TIMEOUT_GV11B_H */