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gpu: nvgpu: therm: Use new error macros

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gk20a_err() and gk20a_warn() require a struct device pointer,
which is not portable across operating systems. The new nvgpu_err()
and nvgpu_warn() macros take struct gk20a pointer. Convert code
to use the more portable macros.

JIRA NVGPU-16

Change-Id: I50bab058076c6896acfc6fa82f78f52a949dd3cf
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1457354
Reviewed-by: Alex Waterman <alexw@nvidia.com>
This commit is contained in:
Terje Bergstrom
2017-04-06 13:02:43 -07:00
committed by mobile promotions
parent 54eb745393
commit 3a1104c369
7 changed files with 41 additions and 50 deletions
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8
drivers/gpu/nvgpu/perf/perf.c
View File

@@ -30,8 +30,7 @@ static void perfrpc_pmucmdhandler(struct gk20a *g, struct pmu_msg *msg,
gk20a_dbg_info("");
if (msg->msg.perf.msg_type != NV_PMU_PERF_MSG_ID_RPC) {
gk20a_err(dev_from_gk20a(g),
"unsupported msg for VFE LOAD RPC %x",
nvgpu_err(g, "unsupported msg for VFE LOAD RPC %x",
msg->msg.perf.msg_type);
return;
}
@@ -97,8 +96,7 @@ u32 perf_pmu_vfe_load(struct gk20a *g)
&seqdesc, ~0);
if (status) {
gk20a_err(dev_from_gk20a(g),
"unable to post perf RPC cmd %x",
nvgpu_err(g, "unable to post perf RPC cmd %x",
cmd.cmd.perf.cmd_type);
goto done;
}
@@ -109,7 +107,7 @@ u32 perf_pmu_vfe_load(struct gk20a *g)
if (handler.success == 0) {
status = -EINVAL;
gk20a_err(dev_from_gk20a(g), "rpc call to load VFE failed");
nvgpu_err(g, "rpc call to load VFE failed");
}
done:
return status;

20
drivers/gpu/nvgpu/perf/vfe_equ.c
View File

@@ -34,8 +34,7 @@ static u32 _vfe_equs_pmudatainit(struct gk20a *g,
status = boardobjgrp_pmudatainit_e255(g, pboardobjgrp, pboardobjgrppmu);
if (status) {
gk20a_err(dev_from_gk20a(g),
"error updating pmu boardobjgrp for vfe equ 0x%x",
nvgpu_err(g, "error updating pmu boardobjgrp for vfe equ 0x%x",
status);
goto done;
}
@@ -74,7 +73,7 @@ u32 vfe_equ_sw_setup(struct gk20a *g)
status = boardobjgrpconstruct_e255(&g->perf_pmu.vfe_equobjs.super);
if (status) {
gk20a_err(dev_from_gk20a(g),
nvgpu_err(g,
"error creating boardobjgrp for clk domain, status - 0x%x",
status);
goto done;
@@ -88,7 +87,7 @@ u32 vfe_equ_sw_setup(struct gk20a *g)
status = BOARDOBJGRP_PMU_CMD_GRP_SET_CONSTRUCT(g, pboardobjgrp,
perf, PERF, vfe_equ, VFE_EQU);
if (status) {
gk20a_err(dev_from_gk20a(g),
nvgpu_err(g,
"error constructing PMU_BOARDOBJ_CMD_GRP_SET interface - 0x%x",
status);
goto done;
@@ -223,8 +222,7 @@ static u32 devinit_get_vfe_equ_table(struct gk20a *g,
break;
default:
gk20a_err(dev_from_gk20a(g),
"unrecognized output id @vfeequ index %d",
nvgpu_err(g, "unrecognized output id @vfeequ index %d",
index);
goto done;
}
@@ -278,7 +276,7 @@ static u32 devinit_get_vfe_equ_table(struct gk20a *g,
CTRL_PERF_VFE_EQU_COMPARE_FUNCTION_GREATER;
break;
default:
gk20a_err(dev_from_gk20a(g),
nvgpu_err(g,
"invalid vfe compare index %x type %x ",
index, cmp_func);
status = -EINVAL;
@@ -295,8 +293,7 @@ static u32 devinit_get_vfe_equ_table(struct gk20a *g,
}
default:
status = -EINVAL;
gk20a_err(dev_from_gk20a(g),
"Invalid equ[%d].type = 0x%x.",
nvgpu_err(g, "Invalid equ[%d].type = 0x%x.",
index, (u8)equ.type);
goto done;
}
@@ -305,7 +302,7 @@ static u32 devinit_get_vfe_equ_table(struct gk20a *g,
pequ = construct_vfe_equ(g, (void *)&equ_data);
if (pequ == NULL) {
gk20a_err(dev_from_gk20a(g),
nvgpu_err(g,
"error constructing vfe_equ boardobj %d", index);
status = -EINVAL;
goto done;
@@ -314,8 +311,7 @@ static u32 devinit_get_vfe_equ_table(struct gk20a *g,
status = boardobjgrp_objinsert(&pvfeequobjs->super.super,
(struct boardobj *)pequ, index);
if (status) {
gk20a_err(dev_from_gk20a(g),
"error adding vfe_equ boardobj %d", index);
nvgpu_err(g, "error adding vfe_equ boardobj %d", index);
status = -EINVAL;
goto done;
}

21
drivers/gpu/nvgpu/perf/vfe_var.c
View File

@@ -40,7 +40,7 @@ static u32 _vfe_vars_pmudatainit(struct gk20a *g,
status = boardobjgrp_pmudatainit_e32(g, pboardobjgrp, pboardobjgrppmu);
if (status) {
gk20a_err(dev_from_gk20a(g),
nvgpu_err(g,
"error updating pmu boardobjgrp for vfe var 0x%x",
status);
goto done;
@@ -100,7 +100,7 @@ u32 vfe_var_sw_setup(struct gk20a *g)
status = boardobjgrpconstruct_e32(&g->perf_pmu.vfe_varobjs.super);
if (status) {
gk20a_err(dev_from_gk20a(g),
nvgpu_err(g,
"error creating boardobjgrp for clk domain, status - 0x%x",
status);
goto done;
@@ -114,7 +114,7 @@ u32 vfe_var_sw_setup(struct gk20a *g)
status = BOARDOBJGRP_PMU_CMD_GRP_SET_CONSTRUCT(g, pboardobjgrp,
perf, PERF, vfe_var, VFE_VAR);
if (status) {
gk20a_err(dev_from_gk20a(g),
nvgpu_err(g,
"error constructing PMU_BOARDOBJ_CMD_GRP_SET interface - 0x%x",
status);
goto done;
@@ -132,7 +132,7 @@ u32 vfe_var_sw_setup(struct gk20a *g)
&g->perf_pmu.vfe_varobjs.super.super,
perf, PERF, vfe_var, VFE_VAR);
if (status) {
gk20a_err(dev_from_gk20a(g),
nvgpu_err(g,
"error constructing PMU_BOARDOBJ_CMD_GRP_GET_STATUS interface - 0x%x",
status);
goto done;
@@ -196,14 +196,14 @@ u32 dev_init_get_vfield_info(struct gk20a *g,
memcpy(&vregheader, vfieldregtableptr, VFIELD_REG_HEADER_SIZE);
if (vregheader.version != VBIOS_VFIELD_REG_TABLE_VERSION_1_0) {
gk20a_err(dev_from_gk20a(g), "invalid vreg header version");
nvgpu_err(g, "invalid vreg header version");
goto done;
}
memcpy(&vheader, vfieldtableptr, VFIELD_HEADER_SIZE);
if (vregheader.version != VBIOS_VFIELD_TABLE_VERSION_1_0) {
gk20a_err(dev_from_gk20a(g), "invalid vfield header version");
nvgpu_err(g, "invalid vfield header version");
goto done;
}
@@ -660,13 +660,13 @@ static u32 vfe_var_construct_single_sensed_fuse(struct gk20a *g,
dev_init_get_vfield_info(g, pvfevar);
/*check whether fuse segment got initialized*/
if (pvfevar->vfield_info.fuse.segment_count == 0) {
gk20a_err(dev_from_gk20a(g), "unable to get fuse reg info %x",
nvgpu_err(g, "unable to get fuse reg info %x",
pvfevar->vfield_info.v_field_id);
status = -EINVAL;
goto exit;
}
if (pvfevar->vfield_ver_info.fuse.segment_count == 0) {
gk20a_err(dev_from_gk20a(g), "unable to get fuse reg info %x",
nvgpu_err(g, "unable to get fuse reg info %x",
pvfevar->vfield_ver_info.v_field_id_ver);
status = -EINVAL;
goto exit;
@@ -997,7 +997,7 @@ static u32 devinit_get_vfe_var_table(struct gk20a *g,
pvar = construct_vfe_var(g, &var_data);
if (pvar == NULL) {
gk20a_err(dev_from_gk20a(g),
nvgpu_err(g,
"error constructing vfe_var boardobj %d",
index);
status = -EINVAL;
@@ -1007,8 +1007,7 @@ static u32 devinit_get_vfe_var_table(struct gk20a *g,
status = boardobjgrp_objinsert(&pvfevarobjs->super.super,
(struct boardobj *)pvar, index);
if (status) {
gk20a_err(dev_from_gk20a(g),
"error adding vfe_var boardobj %d", index);
nvgpu_err(g, "error adding vfe_var boardobj %d", index);
status = -EINVAL;
goto done;
}

4
drivers/gpu/nvgpu/therm/thrm.c
View File

@@ -21,7 +21,7 @@ u32 therm_domain_sw_setup(struct gk20a *g)
status = therm_device_sw_setup(g);
if (status) {
gk20a_err(dev_from_gk20a(g),
nvgpu_err(g,
"error creating boardobjgrp for therm devices, status - 0x%x",
status);
goto exit;
@@ -29,7 +29,7 @@ u32 therm_domain_sw_setup(struct gk20a *g)
status = therm_channel_sw_setup(g);
if (status) {
gk20a_err(dev_from_gk20a(g),
nvgpu_err(g,
"error creating boardobjgrp for therm channel, status - 0x%x",
status);
goto exit;

10
drivers/gpu/nvgpu/therm/thrmchannel.c
View File

@@ -32,7 +32,7 @@ static u32 _therm_channel_pmudatainit_device(struct gk20a *g,
status = boardobj_pmudatainit_super(g, board_obj_ptr, ppmudata);
if (status) {
gk20a_err(dev_from_gk20a(g),
nvgpu_err(g,
"error updating pmu boardobjgrp for therm channel 0x%x",
status);
status = -ENOMEM;
@@ -177,7 +177,7 @@ static u32 devinit_get_therm_channel_table(struct gk20a *g,
therm_channel_size, therm_channel_data.boardobj.type);
if (!boardobj) {
gk20a_err(dev_from_gk20a(g),
nvgpu_err(g,
"unable to create thermal device for %d type %d",
index, therm_channel_data.boardobj.type);
status = -EINVAL;
@@ -188,7 +188,7 @@ static u32 devinit_get_therm_channel_table(struct gk20a *g,
boardobj, obj_index);
if (status) {
gk20a_err(dev_from_gk20a(g),
nvgpu_err(g,
"unable to insert thermal device boardobj for %d", index);
status = -EINVAL;
goto done;
@@ -211,7 +211,7 @@ u32 therm_channel_sw_setup(struct gk20a *g)
/* Construct the Super Class and override the Interfaces */
status = boardobjgrpconstruct_e32(&g->therm_pmu.therm_channelobjs.super);
if (status) {
gk20a_err(dev_from_gk20a(g),
nvgpu_err(g,
"error creating boardobjgrp for therm devices, status - 0x%x",
status);
goto done;
@@ -232,7 +232,7 @@ u32 therm_channel_sw_setup(struct gk20a *g)
status = BOARDOBJGRP_PMU_CMD_GRP_SET_CONSTRUCT(g, pboardobjgrp,
therm, THERM, therm_channel, THERM_CHANNEL);
if (status) {
gk20a_err(dev_from_gk20a(g),
nvgpu_err(g,
"error constructing PMU_BOARDOBJ_CMD_GRP_SET interface - 0x%x",
status);
goto done;

8
drivers/gpu/nvgpu/therm/thrmdev.c
View File

@@ -124,7 +124,7 @@ static u32 devinit_get_therm_device_table(struct gk20a *g,
therm_device_size, therm_device_data.boardobj.type);
if (!boardobj) {
gk20a_err(dev_from_gk20a(g),
nvgpu_err(g,
"unable to create thermal device for %d type %d",
index, therm_device_data.boardobj.type);
status = -EINVAL;
@@ -135,7 +135,7 @@ static u32 devinit_get_therm_device_table(struct gk20a *g,
boardobj, obj_index);
if (status) {
gk20a_err(dev_from_gk20a(g),
nvgpu_err(g,
"unable to insert thermal device boardobj for %d", index);
status = -EINVAL;
goto done;
@@ -158,7 +158,7 @@ u32 therm_device_sw_setup(struct gk20a *g)
/* Construct the Super Class and override the Interfaces */
status = boardobjgrpconstruct_e32(&g->therm_pmu.therm_deviceobjs.super);
if (status) {
gk20a_err(dev_from_gk20a(g),
nvgpu_err(g,
"error creating boardobjgrp for therm devices, status - 0x%x",
status);
goto done;
@@ -179,7 +179,7 @@ u32 therm_device_sw_setup(struct gk20a *g)
status = BOARDOBJGRP_PMU_CMD_GRP_SET_CONSTRUCT(g, pboardobjgrp,
therm, THERM, therm_device, THERM_DEVICE);
if (status) {
gk20a_err(dev_from_gk20a(g),
nvgpu_err(g,
"error constructing PMU_BOARDOBJ_CMD_GRP_SET interface - 0x%x",
status);
goto done;

20
drivers/gpu/nvgpu/therm/thrmpmu.c
View File

@@ -29,15 +29,13 @@ static void therm_pmucmdhandler(struct gk20a *g, struct pmu_msg *msg,
(struct therm_pmucmdhandler_params *)param;
if (msg->msg.therm.msg_type != NV_PMU_THERM_MSG_ID_RPC) {
gk20a_err(dev_from_gk20a(g),
"unknow msg %x",
nvgpu_err(g, "unknow msg %x",
msg->msg.pmgr.msg_type);
return;
}
if (!phandlerparams->prpccall->b_supported)
gk20a_err(dev_from_gk20a(g),
"RPC msg %x failed",
nvgpu_err(g, "RPC msg %x failed",
msg->msg.pmgr.msg_type);
else
phandlerparams->success = 1;
@@ -52,7 +50,7 @@ u32 therm_send_pmgr_tables_to_pmu(struct gk20a *g)
pboardobjgrp = &g->therm_pmu.therm_deviceobjs.super.super;
status = pboardobjgrp->pmuinithandle(g, pboardobjgrp);
if (status) {
gk20a_err(dev_from_gk20a(g),
nvgpu_err(g,
"therm_send_pmgr_tables_to_pmu - therm_device failed %x",
status);
goto exit;
@@ -64,7 +62,7 @@ u32 therm_send_pmgr_tables_to_pmu(struct gk20a *g)
pboardobjgrp = &g->therm_pmu.therm_channelobjs.super.super;
status = pboardobjgrp->pmuinithandle(g, pboardobjgrp);
if (status) {
gk20a_err(dev_from_gk20a(g),
nvgpu_err(g,
"therm_send_pmgr_tables_to_pmu - therm_channel failed %x",
status);
goto exit;
@@ -90,7 +88,7 @@ static u32 therm_pmu_cmd_post(struct gk20a *g, struct pmu_cmd *cmd,
seq_desc,
timeout);
if (status) {
gk20a_err(dev_from_gk20a(g),
nvgpu_err(g,
"unable to post therm cmd for unit %x cmd id %x size %x",
cmd->hdr.unit_id, cmd->cmd.therm.cmd_type, cmd->hdr.size);
goto exit;
@@ -104,7 +102,7 @@ static u32 therm_pmu_cmd_post(struct gk20a *g, struct pmu_cmd *cmd,
&handlerparams->success, 1);
if (handlerparams->success == 0) {
gk20a_err(dev_from_gk20a(g), "could not process cmd\n");
nvgpu_err(g, "could not process cmd\n");
status = -ETIMEDOUT;
goto exit;
}
@@ -225,7 +223,7 @@ u32 therm_configure_therm_alert(struct gk20a *g)
status = therm_enable_slct_notification_request(g);
if (status) {
gk20a_err(dev_from_gk20a(g),
nvgpu_err(g,
"therm_enable_slct_notification_request-failed %d",
status);
goto exit;
@@ -233,7 +231,7 @@ u32 therm_configure_therm_alert(struct gk20a *g)
status = therm_send_slct_configuration_to_pmu(g);
if (status) {
gk20a_err(dev_from_gk20a(g),
nvgpu_err(g,
"therm_send_slct_configuration_to_pmu-failed %d",
status);
goto exit;
@@ -241,7 +239,7 @@ u32 therm_configure_therm_alert(struct gk20a *g)
status = therm_set_warn_temp_limit(g);
if (status) {
gk20a_err(dev_from_gk20a(g),
nvgpu_err(g,
"therm_set_warn_temp_limit-failed %d",
status);
goto exit;