diff --git a/drivers/gpu/nvgpu/common/pmu/clk/clk.c b/drivers/gpu/nvgpu/common/pmu/clk/clk.c
index 52cb801d5..7b321e314 100644
--- a/drivers/gpu/nvgpu/common/pmu/clk/clk.c
+++ b/drivers/gpu/nvgpu/common/pmu/clk/clk.c
@@ -77,7 +77,7 @@ int nvgpu_clk_domain_freq_to_volt(struct gk20a *g, u8 clkdomain_idx,
 	return status;
 }
 
-static u32 nvgpu_clk_vf_change_inject_data_fill(struct gk20a *g,
+static void nvgpu_clk_vf_change_inject_data_fill(struct gk20a *g,
 	struct nv_pmu_clk_rpc *rpccall,
 	struct nvgpu_set_fll_clk *setfllclk)
 {
@@ -106,8 +106,6 @@ static u32 nvgpu_clk_vf_change_inject_data_fill(struct gk20a *g,
 	vfchange->volt_list.rails[0].voltage_uv = setfllclk->voltuv;
 	vfchange->volt_list.rails[0].voltage_min_noise_unaware_uv =
 		setfllclk->voltuv;
-
-	return 0;
 }
 
 static int clk_pmu_vf_inject(struct gk20a *g,
diff --git a/drivers/gpu/nvgpu/common/pmu/clk/clk_domain.c b/drivers/gpu/nvgpu/common/pmu/clk/clk_domain.c
index 35607ce5a..7e8f32fda 100644
--- a/drivers/gpu/nvgpu/common/pmu/clk/clk_domain.c
+++ b/drivers/gpu/nvgpu/common/pmu/clk/clk_domain.c
@@ -258,8 +258,20 @@ int nvgpu_clk_domain_sw_setup(struct gk20a *g)
 	pboardobjgrp->pmudatainstget  = _clk_domains_pmudata_instget;
 
 	/* Initialize mask to zero.*/
-	boardobjgrpmask_e32_init(&pclkdomainobjs->prog_domains_mask, NULL);
-	boardobjgrpmask_e32_init(&pclkdomainobjs->master_domains_mask, NULL);
+	status = boardobjgrpmask_e32_init(&pclkdomainobjs->prog_domains_mask,
+			NULL);
+	if (status != 0) {
+		nvgpu_err(g, "boardobjgrpmask_e32_init(prog) failed err=%d",
+			status);
+		goto done;
+	}
+	status = boardobjgrpmask_e32_init(&pclkdomainobjs->master_domains_mask,
+			NULL);
+	if (status != 0) {
+		nvgpu_err(g, "boardobjgrpmask_e32_init(master) failed err=%d",
+			status);
+		goto done;
+	}
 	pclkdomainobjs->b_enforce_vf_monotonicity = true;
 	pclkdomainobjs->b_enforce_vf_smoothening = true;
 
@@ -589,7 +601,8 @@ static int devinit_get_clocks_table(struct gk20a *g,
 	nvgpu_memcpy((u8 *)&clocks_table_header, clocks_table_ptr,
 			VBIOS_CLOCKS_TABLE_35_HEADER_SIZE_09);
 
-	devinit_get_clocks_table_35(g, pclkdomainobjs, clocks_table_ptr);
+	status = devinit_get_clocks_table_35(g, pclkdomainobjs,
+			clocks_table_ptr);
 
 done:
 	return status;
@@ -1155,7 +1168,8 @@ static int clk_domain_construct_35_master(struct gk20a *g,
 	pdomain->master.slave_idxs_mask = 0;
 	pdomain->super.clk_pos = 0;
 
-	boardobjgrpmask_e32_init(&pdomain->master_slave_domains_grp_mask, NULL);
+	status = boardobjgrpmask_e32_init(
+			&pdomain->master_slave_domains_grp_mask, NULL);
 
 	return status;
 }
diff --git a/drivers/gpu/nvgpu/common/pmu/clk/clk_fll.c b/drivers/gpu/nvgpu/common/pmu/clk/clk_fll.c
index c6984054a..f50fb311e 100644
--- a/drivers/gpu/nvgpu/common/pmu/clk/clk_fll.c
+++ b/drivers/gpu/nvgpu/common/pmu/clk/clk_fll.c
@@ -178,7 +178,12 @@ int nvgpu_clk_fll_sw_setup(struct gk20a *g)
 	pfllobjs->lut_min_voltage_uv = CTRL_CLK_LUT_MIN_VOLTAGE_UV;
 
 	/* Initialize lut prog master mask to zero.*/
-	boardobjgrpmask_e32_init(&pfllobjs->lut_prog_master_mask, NULL);
+	status = boardobjgrpmask_e32_init(&pfllobjs->lut_prog_master_mask,
+			NULL);
+	if (status != 0) {
+		nvgpu_err(g, "boardobjgrpmask_e32_init failed err=%d", status);
+		goto done;
+	}
 
 	status = devinit_get_fll_device_table(g, pfllobjs);
 	if (status != 0) {
@@ -472,8 +477,17 @@ static struct fll_device *construct_fll_device(struct gk20a *g,
 		(u8 *)&pfll_dev->regime_desc,
 		sizeof(struct nv_pmu_clk_regime_desc));
 	board_obj_fll_ptr->b_dvco_1x=pfll_dev->b_dvco_1x;
-	boardobjgrpmask_e32_init(
+
+	status = boardobjgrpmask_e32_init(
 		&board_obj_fll_ptr->lut_prog_broadcast_slave_mask, NULL);
+	if (status != 0) {
+		nvgpu_err(g, "boardobjgrpmask_e32_init failed err=%d", status);
+		status = board_obj_ptr->destruct(board_obj_ptr);
+		if (status != 0) {
+			nvgpu_err(g, "destruct failed err=%d", status);
+		}
+		return NULL;
+	}
 
 	nvgpu_log_info(g, " Done");
 
diff --git a/drivers/gpu/nvgpu/common/pmu/clk/clk_freq_controller.c b/drivers/gpu/nvgpu/common/pmu/clk/clk_freq_controller.c
index dd1caf01e..6a8ad97e3 100644
--- a/drivers/gpu/nvgpu/common/pmu/clk/clk_freq_controller.c
+++ b/drivers/gpu/nvgpu/common/pmu/clk/clk_freq_controller.c
@@ -453,8 +453,12 @@ int nvgpu_clk_freq_controller_sw_setup(struct gk20a *g)
 	pboardobjgrp->pmustatusinstget  = NULL;
 
 	/* Initialize mask to zero.*/
-	boardobjgrpmask_e32_init(&pclk_freq_controllers->freq_ctrl_load_mask,
-		NULL);
+	status = boardobjgrpmask_e32_init(
+			&pclk_freq_controllers->freq_ctrl_load_mask, NULL);
+	if (status != 0) {
+		nvgpu_err(g, "boardobjgrpmask_e32_init failed err=%d", status);
+		goto done;
+	}
 
 	BOARDOBJGRP_PMU_CONSTRUCT(pboardobjgrp, CLK, CLK_FREQ_CONTROLLER);
 
@@ -485,8 +489,13 @@ int nvgpu_clk_freq_controller_sw_setup(struct gk20a *g)
 				break;
 			}
 		}
-		nvgpu_boardobjgrpmask_bit_set(&pclk_freq_controllers->
+		status = nvgpu_boardobjgrpmask_bit_set(&pclk_freq_controllers->
 			freq_ctrl_load_mask.super, i);
+		if (status != 0) {
+			nvgpu_err(g, "boardobjgrpmask_bitset failed err=%d",
+				status);
+			goto done;
+		}
 	}
 done:
 		nvgpu_log_info(g, " done status %x", status);
diff --git a/drivers/gpu/nvgpu/common/pmu/clk/clk_freq_domain.c b/drivers/gpu/nvgpu/common/pmu/clk/clk_freq_domain.c
index 23584e714..da790ee7a 100644
--- a/drivers/gpu/nvgpu/common/pmu/clk/clk_freq_domain.c
+++ b/drivers/gpu/nvgpu/common/pmu/clk/clk_freq_domain.c
@@ -186,7 +186,7 @@ int nvgpu_clk_freq_domain_sw_setup(struct gk20a *g)
 	}
 
 	for (idx = 0; idx < num_of_domains; idx++) {
-		memset(&freq_domain_data, 0, sizeof(freq_domain_data));
+		(void) memset(&freq_domain_data, 0, sizeof(freq_domain_data));
 
 		freq_domain_data.super.type = clk_freq_domain_type[idx].type;
 		freq_domain_data.freq_domain.clk_domain =
diff --git a/drivers/gpu/nvgpu/common/pmu/clk/clk_prog.c b/drivers/gpu/nvgpu/common/pmu/clk/clk_prog.c
index 88da7855d..effe4a793 100644
--- a/drivers/gpu/nvgpu/common/pmu/clk/clk_prog.c
+++ b/drivers/gpu/nvgpu/common/pmu/clk/clk_prog.c
@@ -266,7 +266,7 @@ static int devinit_get_clk_prog_table_35(struct gk20a *g,
 	pclkprogobjs->vf_sec_entry_count = header.vf_sec_entry_count;
 
 	for (i = 0; i < header.entry_count; i++) {
-		memset(&prog_data, 0x0, (u32)sizeof(prog_data));
+		(void) memset(&prog_data, 0x0, (u32)sizeof(prog_data));
 
 		/* Read table entries*/
 		entry = clkprogs_tbl_ptr + hszfmt +
@@ -275,16 +275,16 @@ static int devinit_get_clk_prog_table_35(struct gk20a *g,
 			(header.vf_sec_entry_count * vfsecszfmt)));
 
 		nvgpu_memcpy((u8 *)&prog, entry, szfmt);
-		memset(vfentries, 0xFF,
+		(void) memset(vfentries, 0xFF,
 			sizeof(struct ctrl_clk_clk_prog_1x_master_vf_entry) *
 			CTRL_CLK_CLK_PROG_1X_MASTER_VF_ENTRY_MAX_ENTRIES);
-		memset(voltrailsecvfentries, 0xFF,
+		(void) memset(voltrailsecvfentries, 0xFF,
 			sizeof(struct ctrl_clk_clk_prog_35_master_sec_vf_entry_voltrail) *
 			CTRL_CLK_CLK_PROG_1X_MASTER_VF_ENTRY_MAX_ENTRIES);
-		memset(ratioslaveentries, 0xFF,
+		(void) memset(ratioslaveentries, 0xFF,
 			sizeof(struct ctrl_clk_clk_prog_1x_master_ratio_slave_entry) *
 			CTRL_CLK_PROG_1X_MASTER_MAX_SLAVE_ENTRIES);
-		memset(tableslaveentries, 0xFF,
+		(void) memset(tableslaveentries, 0xFF,
 			sizeof(struct ctrl_clk_clk_prog_1x_master_table_slave_entry) *
 			CTRL_CLK_PROG_1X_MASTER_MAX_SLAVE_ENTRIES);
 
@@ -824,7 +824,7 @@ static int clk_prog_construct_35_master(struct gk20a *g,
 		(struct ctrl_clk_clk_prog_35_master_sec_vf_entry_voltrail *)
 				nvgpu_kzalloc(g, voltrail_sec_vfsize);
 
-	memset(pclkprog->p_voltrail_sec_vf_entries,
+	(void) memset(pclkprog->p_voltrail_sec_vf_entries,
 		CTRL_CLK_CLK_DOMAIN_INDEX_INVALID, voltrail_sec_vfsize);
 
 	nvgpu_memcpy((u8 *)pclkprog->p_voltrail_sec_vf_entries,
@@ -914,7 +914,7 @@ static int clk_prog_construct_35_master_table(struct gk20a *g,
 		goto exit;
 	}
 
-	memset(pclkprog->table.p_slave_entries,
+	(void) memset(pclkprog->table.p_slave_entries,
 			CTRL_CLK_CLK_DOMAIN_INDEX_INVALID, slavesize);
 
 	nvgpu_memcpy((u8 *)pclkprog->table.p_slave_entries,
@@ -955,7 +955,10 @@ static struct clk_prog *construct_clk_prog(struct gk20a *g, void *pargs)
 
 	if (status != 0) {
 		if (board_obj_ptr != NULL) {
-			board_obj_ptr->destruct(board_obj_ptr);
+			status = board_obj_ptr->destruct(board_obj_ptr);
+			if (status != 0) {
+				nvgpu_err(g, "destruct failed err=%d", status);
+			}
 		}
 		return NULL;
 	}
diff --git a/drivers/gpu/nvgpu/common/pmu/clk/clk_vin.c b/drivers/gpu/nvgpu/common/pmu/clk/clk_vin.c
index 924a6156b..ae749ae34 100644
--- a/drivers/gpu/nvgpu/common/pmu/clk/clk_vin.c
+++ b/drivers/gpu/nvgpu/common/pmu/clk/clk_vin.c
@@ -218,7 +218,12 @@ int nvgpu_clk_vin_sw_setup(struct gk20a *g)
 	}
 
 	/*update vin calibration to fuse */
-	nvgpu_clk_avfs_get_vin_cal_fuse_v20(g, pvinobjs, pvindev);
+	status = nvgpu_clk_avfs_get_vin_cal_fuse_v20(g, pvinobjs, pvindev);
+	if (status != 0) {
+		nvgpu_err(g, "clk_avfs_get_vin_cal_fuse_v20 failed err=%d",
+			status);
+		goto done;
+	}
 
 	status = BOARDOBJGRP_PMU_CMD_GRP_GET_STATUS_CONSTRUCT(g,
 				&g->pmu.clk_pmu->avfs_vinobjs->super.super,