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gpu: nvgpu: fix MMU fault register mismatches

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Fix the following MMU register mismatches by using the appropriate HALs
when possible:
 - fb_mmu_fault_status_r
 - fb_mmu_debug_ctrl_r

Jira NVGPU-9217

Change-Id: I3380ac449f20f2ce47b439303b9abd19010e6b26
Signed-off-by: Austin Tajiri <atajiri@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2869899
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: Tejal Kudav <tkudav@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
This commit is contained in:
Austin Tajiri
2023-03-13 00:36:17 +00:00
committed by mobile promotions
parent f2ce282b7e
commit 3a69b445fc
2 changed files with 4 additions and 4 deletions
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4
drivers/gpu/nvgpu/hal/fb/fb_gm20b.c
View File

@@ -1,7 +1,7 @@
/* /*
* GM20B GPC MMU * GM20B GPC MMU
* *
* Copyright (c) 2014-2022, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2014-2023, NVIDIA CORPORATION. All rights reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a * Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"), * copy of this software and associated documentation files (the "Software"),
@@ -90,7 +90,7 @@ void gm20b_fb_set_mmu_debug_mode(struct gk20a *g, bool enable)
void gm20b_fb_set_debug_mode(struct gk20a *g, bool enable) void gm20b_fb_set_debug_mode(struct gk20a *g, bool enable)
{ {
gm20b_fb_set_mmu_debug_mode(g, enable); g->ops.fb.set_mmu_debug_mode(g, enable);
g->ops.gr.set_debug_mode(g, enable); g->ops.gr.set_debug_mode(g, enable);
} }
#endif #endif

4
drivers/gpu/nvgpu/hal/fb/fb_mmu_fault_gv11b_fusa.c
View File

@@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2016-2022, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2016-2023, NVIDIA CORPORATION. All rights reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a * Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"), * copy of this software and associated documentation files (the "Software"),
@@ -587,7 +587,7 @@ void gv11b_fb_handle_mmu_fault(struct gk20a *g, u32 niso_intr)
#ifdef CONFIG_NVGPU_REPLAYABLE_FAULT #ifdef CONFIG_NVGPU_REPLAYABLE_FAULT
void gv11b_fb_handle_replayable_mmu_fault(struct gk20a *g) void gv11b_fb_handle_replayable_mmu_fault(struct gk20a *g)
{ {
u32 fault_status = nvgpu_readl(g, fb_mmu_fault_status_r()); u32 fault_status = g->ops.fb.read_mmu_fault_status(g);
if ((fault_status & fb_mmu_fault_status_replayable_m()) == 0U) { if ((fault_status & fb_mmu_fault_status_replayable_m()) == 0U) {
return; return;