From 3b0062bbd9804610167af63dd341e6b8a0173d09 Mon Sep 17 00:00:00 2001 From: Deepak Nibade Date: Thu, 2 May 2019 15:32:17 +0530 Subject: [PATCH] gpu: nvgpu: fix MISRA 5.7 violations in gr.config unit Below 5.7 violations are reported in common.gr.config unit : nvgpu/drivers/gpu/nvgpu/common/gr/gr_config.c:628: identifier_reuse: Identifier "sm_info" is already used to represent a type. Fix them by renaming struct sm_info to struct nvgpu_sm_info Jira NVGPU-3225 Change-Id: I26f70a4ed2a5a845e0dc9daeb8fb5474e35d42fb Signed-off-by: Deepak Nibade Reviewed-on: https://git-master.nvidia.com/r/2110986 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/common/gr/fs_state.c | 2 +- drivers/gpu/nvgpu/common/gr/gr_config.c | 22 +++++++++---------- drivers/gpu/nvgpu/common/gr/gr_config_priv.h | 4 ++-- drivers/gpu/nvgpu/common/vgpu/gr/gr_vgpu.c | 4 ++-- .../gpu/nvgpu/hal/gr/config/gr_config_gm20b.c | 2 +- .../gpu/nvgpu/hal/gr/config/gr_config_gv100.c | 2 +- drivers/gpu/nvgpu/hal/gr/gr/gr_gk20a.c | 6 ++--- drivers/gpu/nvgpu/hal/gr/gr/gr_gm20b.c | 4 ++-- drivers/gpu/nvgpu/hal/gr/gr/gr_gv11b.c | 6 ++--- drivers/gpu/nvgpu/hal/gr/init/gr_init_gm20b.c | 2 +- drivers/gpu/nvgpu/hal/gr/init/gr_init_gp10b.c | 2 +- drivers/gpu/nvgpu/hal/gr/init/gr_init_gv11b.c | 4 ++-- drivers/gpu/nvgpu/include/nvgpu/gr/config.h | 20 ++++++++--------- drivers/gpu/nvgpu/os/linux/ioctl_ctrl.c | 2 +- 14 files changed, 41 insertions(+), 41 deletions(-) diff --git a/drivers/gpu/nvgpu/common/gr/fs_state.c b/drivers/gpu/nvgpu/common/gr/fs_state.c index af1661d4c..d29f0ef4d 100644 --- a/drivers/gpu/nvgpu/common/gr/fs_state.c +++ b/drivers/gpu/nvgpu/common/gr/fs_state.c @@ -106,7 +106,7 @@ int nvgpu_gr_fs_state_init(struct gk20a *g, struct nvgpu_gr_config *config) for (sm_id = 0; sm_id < g->ops.gr.init.get_no_of_sm(g); sm_id++) { - struct sm_info *sm_info = + struct nvgpu_sm_info *sm_info = nvgpu_gr_config_get_sm_info(config, sm_id); tpc_index = nvgpu_gr_config_get_sm_info_tpc_index(sm_info); gpc_index = nvgpu_gr_config_get_sm_info_gpc_index(sm_info); diff --git a/drivers/gpu/nvgpu/common/gr/gr_config.c b/drivers/gpu/nvgpu/common/gr/gr_config.c index 929c65497..f0ef8f74b 100644 --- a/drivers/gpu/nvgpu/common/gr/gr_config.c +++ b/drivers/gpu/nvgpu/common/gr/gr_config.c @@ -24,7 +24,7 @@ #include #include -#include "common/gr/gr_config_priv.h" +#include "gr_config_priv.h" struct nvgpu_gr_config *nvgpu_gr_config_init(struct gk20a *g) { @@ -80,7 +80,7 @@ struct nvgpu_gr_config *nvgpu_gr_config_init(struct gk20a *g) sm_info_size = (size_t)config->gpc_count * (size_t)config->max_tpc_per_gpc_count * (size_t)config->sm_count_per_tpc * - sizeof(struct sm_info); + sizeof(struct nvgpu_sm_info); if (config->sm_to_cluster == NULL) { config->sm_to_cluster = nvgpu_kzalloc(g, sm_info_size); @@ -608,51 +608,51 @@ void nvgpu_gr_config_set_no_of_sm(struct nvgpu_gr_config *config, u32 no_of_sm) config->no_of_sm = no_of_sm; } -struct sm_info *nvgpu_gr_config_get_sm_info(struct nvgpu_gr_config *config, +struct nvgpu_sm_info *nvgpu_gr_config_get_sm_info(struct nvgpu_gr_config *config, u32 sm_id) { return &config->sm_to_cluster[sm_id]; } -u32 nvgpu_gr_config_get_sm_info_gpc_index(struct sm_info *sm_info) +u32 nvgpu_gr_config_get_sm_info_gpc_index(struct nvgpu_sm_info *sm_info) { return sm_info->gpc_index; } -void nvgpu_gr_config_set_sm_info_gpc_index(struct sm_info *sm_info, +void nvgpu_gr_config_set_sm_info_gpc_index(struct nvgpu_sm_info *sm_info, u32 gpc_index) { sm_info->gpc_index = gpc_index; } -u32 nvgpu_gr_config_get_sm_info_tpc_index(struct sm_info *sm_info) +u32 nvgpu_gr_config_get_sm_info_tpc_index(struct nvgpu_sm_info *sm_info) { return sm_info->tpc_index; } -void nvgpu_gr_config_set_sm_info_tpc_index(struct sm_info *sm_info, +void nvgpu_gr_config_set_sm_info_tpc_index(struct nvgpu_sm_info *sm_info, u32 tpc_index) { sm_info->tpc_index = tpc_index; } -u32 nvgpu_gr_config_get_sm_info_global_tpc_index(struct sm_info *sm_info) +u32 nvgpu_gr_config_get_sm_info_global_tpc_index(struct nvgpu_sm_info *sm_info) { return sm_info->global_tpc_index; } -void nvgpu_gr_config_set_sm_info_global_tpc_index(struct sm_info *sm_info, +void nvgpu_gr_config_set_sm_info_global_tpc_index(struct nvgpu_sm_info *sm_info, u32 global_tpc_index) { sm_info->global_tpc_index = global_tpc_index; } -u32 nvgpu_gr_config_get_sm_info_sm_index(struct sm_info *sm_info) +u32 nvgpu_gr_config_get_sm_info_sm_index(struct nvgpu_sm_info *sm_info) { return sm_info->sm_index; } -void nvgpu_gr_config_set_sm_info_sm_index(struct sm_info *sm_info, +void nvgpu_gr_config_set_sm_info_sm_index(struct nvgpu_sm_info *sm_info, u32 sm_index) { sm_info->sm_index = sm_index; diff --git a/drivers/gpu/nvgpu/common/gr/gr_config_priv.h b/drivers/gpu/nvgpu/common/gr/gr_config_priv.h index 92f3d41b8..a3fec9962 100644 --- a/drivers/gpu/nvgpu/common/gr/gr_config_priv.h +++ b/drivers/gpu/nvgpu/common/gr/gr_config_priv.h @@ -29,7 +29,7 @@ struct gk20a; -struct sm_info { +struct nvgpu_sm_info { u32 gpc_index; u32 tpc_index; u32 sm_index; @@ -67,7 +67,7 @@ struct nvgpu_gr_config { u32 map_row_offset; u32 no_of_sm; - struct sm_info *sm_to_cluster; + struct nvgpu_sm_info *sm_to_cluster; }; #endif /* NVGPU_GR_CONFIG_PRIV_H */ diff --git a/drivers/gpu/nvgpu/common/vgpu/gr/gr_vgpu.c b/drivers/gpu/nvgpu/common/vgpu/gr/gr_vgpu.c index dc1c07b12..6ea7b0954 100644 --- a/drivers/gpu/nvgpu/common/vgpu/gr/gr_vgpu.c +++ b/drivers/gpu/nvgpu/common/vgpu/gr/gr_vgpu.c @@ -375,7 +375,7 @@ static int vgpu_gr_init_gr_config(struct gk20a *g, struct nvgpu_gr *gr) gr->config->sm_to_cluster = nvgpu_kzalloc(g, config->gpc_count * config->max_tpc_per_gpc_count * sm_per_tpc * - sizeof(struct sm_info)); + sizeof(struct nvgpu_sm_info)); if (!gr->config->sm_to_cluster) { goto cleanup; } @@ -1116,7 +1116,7 @@ int vgpu_gr_init_sm_id_table(struct gk20a *g, struct nvgpu_gr_config *gr_config) struct tegra_vgpu_vsms_mapping_params *p = &msg.params.vsms_mapping; struct tegra_vgpu_vsms_mapping_entry *entry; struct vgpu_priv_data *priv = vgpu_get_priv_data(g); - struct sm_info *sm_info; + struct nvgpu_sm_info *sm_info; int err; size_t oob_size; void *handle = NULL; diff --git a/drivers/gpu/nvgpu/hal/gr/config/gr_config_gm20b.c b/drivers/gpu/nvgpu/hal/gr/config/gr_config_gm20b.c index e5bc8a8bc..52c01cdfc 100644 --- a/drivers/gpu/nvgpu/hal/gr/config/gr_config_gm20b.c +++ b/drivers/gpu/nvgpu/hal/gr/config/gr_config_gm20b.c @@ -40,7 +40,7 @@ int gm20b_gr_config_init_sm_id_table(struct gk20a *g, for (gpc = 0; gpc < nvgpu_gr_config_get_gpc_count(gr_config); gpc++) { if (tpc < nvgpu_gr_config_get_gpc_tpc_count(gr_config, gpc)) { - struct sm_info *sm_info = + struct nvgpu_sm_info *sm_info = nvgpu_gr_config_get_sm_info(gr_config, sm_id); nvgpu_gr_config_set_sm_info_tpc_index(sm_info, tpc); nvgpu_gr_config_set_sm_info_gpc_index(sm_info, gpc); diff --git a/drivers/gpu/nvgpu/hal/gr/config/gr_config_gv100.c b/drivers/gpu/nvgpu/hal/gr/config/gr_config_gv100.c index b573b60ef..682aedea0 100644 --- a/drivers/gpu/nvgpu/hal/gr/config/gr_config_gv100.c +++ b/drivers/gpu/nvgpu/hal/gr/config/gr_config_gv100.c @@ -248,7 +248,7 @@ int gv100_gr_config_init_sm_id_table(struct gk20a *g, for (tpc = 0, sm_id = 0; sm_id < num_sm; tpc++, sm_id += sm_per_tpc) { for (sm = 0; sm < sm_per_tpc; sm++) { u32 index = sm_id + sm; - struct sm_info *sm_info = + struct nvgpu_sm_info *sm_info = nvgpu_gr_config_get_sm_info(gr_config, index); nvgpu_gr_config_set_sm_info_gpc_index(sm_info, gpc_table[tpc]); diff --git a/drivers/gpu/nvgpu/hal/gr/gr/gr_gk20a.c b/drivers/gpu/nvgpu/hal/gr/gr/gr_gk20a.c index c9d514d8e..5306defff 100644 --- a/drivers/gpu/nvgpu/hal/gr/gr/gr_gk20a.c +++ b/drivers/gpu/nvgpu/hal/gr/gr/gr_gk20a.c @@ -1912,7 +1912,7 @@ int gr_gk20a_set_sm_debug_mode(struct gk20a *g, for (sm_id = 0; sm_id < no_of_sm; sm_id++) { u32 gpc, tpc; u32 tpc_offset, gpc_offset, reg_offset, reg_mask, reg_val; - struct sm_info *sm_info; + struct nvgpu_sm_info *sm_info; if ((sms & BIT64(sm_id)) == 0ULL) { continue; @@ -2113,7 +2113,7 @@ int gr_gk20a_wait_for_pause(struct gk20a *g, struct nvgpu_warpstate *w_state) /* Lock down all SMs */ for (sm_id = 0; sm_id < no_of_sm; sm_id++) { - struct sm_info *sm_info = + struct nvgpu_sm_info *sm_info = nvgpu_gr_config_get_sm_info(g->gr->config, sm_id); gpc = nvgpu_gr_config_get_sm_info_gpc_index(sm_info); tpc = nvgpu_gr_config_get_sm_info_tpc_index(sm_info); @@ -2191,7 +2191,7 @@ u32 gr_gk20a_tpc_enabled_exceptions(struct gk20a *g) u32 no_of_sm = g->ops.gr.init.get_no_of_sm(g); for (sm_id = 0; sm_id < no_of_sm; sm_id++) { - struct sm_info *sm_info = + struct nvgpu_sm_info *sm_info = nvgpu_gr_config_get_sm_info(g->gr->config, sm_id); tpc_offset = tpc_in_gpc_stride * nvgpu_gr_config_get_sm_info_tpc_index(sm_info); diff --git a/drivers/gpu/nvgpu/hal/gr/gr/gr_gm20b.c b/drivers/gpu/nvgpu/hal/gr/gr/gr_gm20b.c index 51138714c..f346c4efe 100644 --- a/drivers/gpu/nvgpu/hal/gr/gr/gr_gm20b.c +++ b/drivers/gpu/nvgpu/hal/gr/gr/gr_gm20b.c @@ -491,7 +491,7 @@ void gr_gm20b_bpt_reg_info(struct gk20a *g, struct nvgpu_warpstate *w_state) u32 numWarpPerTpc = g->params.sm_arch_warp_count * numSmPerTpc; for (sm_id = 0; sm_id < no_of_sm; sm_id++) { - struct sm_info *sm_info = + struct nvgpu_sm_info *sm_info = nvgpu_gr_config_get_sm_info(gr->config, sm_id); gpc = nvgpu_gr_config_get_sm_info_gpc_index(sm_info); tpc = nvgpu_gr_config_get_sm_info_tpc_index(sm_info); @@ -635,7 +635,7 @@ int gm20b_gr_clear_sm_error_state(struct gk20a *g, } if (gk20a_is_channel_ctx_resident(ch)) { - struct sm_info *sm_info = + struct nvgpu_sm_info *sm_info = nvgpu_gr_config_get_sm_info(g->gr->config, sm_id); gpc = nvgpu_gr_config_get_sm_info_gpc_index(sm_info); tpc = nvgpu_gr_config_get_sm_info_tpc_index(sm_info); diff --git a/drivers/gpu/nvgpu/hal/gr/gr/gr_gv11b.c b/drivers/gpu/nvgpu/hal/gr/gr/gr_gv11b.c index 382f01071..0752bb57b 100644 --- a/drivers/gpu/nvgpu/hal/gr/gr/gr_gv11b.c +++ b/drivers/gpu/nvgpu/hal/gr/gr/gr_gv11b.c @@ -1380,7 +1380,7 @@ void gv11b_gr_bpt_reg_info(struct gk20a *g, struct nvgpu_warpstate *w_state) u32 no_of_sm = g->ops.gr.init.get_no_of_sm(g); for (sm_id = 0; sm_id < no_of_sm; sm_id++) { - struct sm_info *sm_info = + struct nvgpu_sm_info *sm_info = nvgpu_gr_config_get_sm_info(gr->config, sm_id); gpc = nvgpu_gr_config_get_sm_info_gpc_index(sm_info); tpc = nvgpu_gr_config_get_sm_info_tpc_index(sm_info); @@ -1454,7 +1454,7 @@ int gv11b_gr_set_sm_debug_mode(struct gk20a *g, for (sm_id = 0; sm_id < no_of_sm; sm_id++) { u32 gpc, tpc, sm; u32 reg_offset, reg_mask, reg_val; - struct sm_info *sm_info; + struct nvgpu_sm_info *sm_info; if ((sms & BIT64(sm_id)) == 0ULL) { continue; @@ -2881,7 +2881,7 @@ int gv11b_gr_clear_sm_error_state(struct gk20a *g, } if (gk20a_is_channel_ctx_resident(ch)) { - struct sm_info *sm_info = + struct nvgpu_sm_info *sm_info = nvgpu_gr_config_get_sm_info(g->gr->config, sm_id); gpc = nvgpu_gr_config_get_sm_info_gpc_index(sm_info); diff --git a/drivers/gpu/nvgpu/hal/gr/init/gr_init_gm20b.c b/drivers/gpu/nvgpu/hal/gr/init/gr_init_gm20b.c index ad3470b78..33b17e009 100644 --- a/drivers/gpu/nvgpu/hal/gr/init/gr_init_gm20b.c +++ b/drivers/gpu/nvgpu/hal/gr/init/gr_init_gm20b.c @@ -211,7 +211,7 @@ int gm20b_gr_init_sm_id_config(struct gk20a *g, u32 *tpc_sm_id, for (j = 0U; j < 4U; j++) { u32 sm_id = (i * 4U) + j; u32 bits; - struct sm_info *sm_info; + struct nvgpu_sm_info *sm_info; if (sm_id >= nvgpu_gr_config_get_tpc_count(gr_config)) { diff --git a/drivers/gpu/nvgpu/hal/gr/init/gr_init_gp10b.c b/drivers/gpu/nvgpu/hal/gr/init/gr_init_gp10b.c index 356e91079..84ad0b10c 100644 --- a/drivers/gpu/nvgpu/hal/gr/init/gr_init_gp10b.c +++ b/drivers/gpu/nvgpu/hal/gr/init/gr_init_gp10b.c @@ -105,7 +105,7 @@ int gp10b_gr_init_sm_id_config(struct gk20a *g, u32 *tpc_sm_id, for (j = 0U; j < 4U; j++) { u32 sm_id = (i * 4U) + j; u32 bits; - struct sm_info *sm_info; + struct nvgpu_sm_info *sm_info; if (sm_id >= nvgpu_gr_config_get_tpc_count(gr_config)) { diff --git a/drivers/gpu/nvgpu/hal/gr/init/gr_init_gv11b.c b/drivers/gpu/nvgpu/hal/gr/init/gr_init_gv11b.c index 6b5a2902b..56574cdcd 100644 --- a/drivers/gpu/nvgpu/hal/gr/init/gr_init_gv11b.c +++ b/drivers/gpu/nvgpu/hal/gr/init/gr_init_gv11b.c @@ -377,7 +377,7 @@ void gv11b_gr_init_sm_id_numbering(struct gk20a *g, u32 gpc, u32 tpc, u32 smid, u32 gpc_offset = gpc_stride * gpc; u32 global_tpc_index; u32 tpc_offset; - struct sm_info *sm_info = + struct nvgpu_sm_info *sm_info = nvgpu_gr_config_get_sm_info(gr_config, smid); global_tpc_index = @@ -414,7 +414,7 @@ int gv11b_gr_init_sm_id_config(struct gk20a *g, u32 *tpc_sm_id, for (j = 0U; j < 4U; j++) { u32 sm_id; u32 bits; - struct sm_info *sm_info; + struct nvgpu_sm_info *sm_info; tpc_id = (i << 2) + j; sm_id = tpc_id * sm_per_tpc; diff --git a/drivers/gpu/nvgpu/include/nvgpu/gr/config.h b/drivers/gpu/nvgpu/include/nvgpu/gr/config.h index 7cf53c304..087ae04c5 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/gr/config.h +++ b/drivers/gpu/nvgpu/include/nvgpu/gr/config.h @@ -26,7 +26,7 @@ #include struct gk20a; -struct sm_info; +struct nvgpu_sm_info; struct nvgpu_gr_config; struct nvgpu_gr_config *nvgpu_gr_config_init(struct gk20a *g); @@ -74,19 +74,19 @@ u32 nvgpu_gr_config_get_pes_tpc_mask(struct nvgpu_gr_config *config, u32 nvgpu_gr_config_get_gpc_mask(struct nvgpu_gr_config *config); u32 nvgpu_gr_config_get_no_of_sm(struct nvgpu_gr_config *config); void nvgpu_gr_config_set_no_of_sm(struct nvgpu_gr_config *config, u32 no_of_sm); -struct sm_info *nvgpu_gr_config_get_sm_info(struct nvgpu_gr_config *config, +struct nvgpu_sm_info *nvgpu_gr_config_get_sm_info(struct nvgpu_gr_config *config, u32 sm_id); -u32 nvgpu_gr_config_get_sm_info_gpc_index(struct sm_info *sm_info); -void nvgpu_gr_config_set_sm_info_gpc_index(struct sm_info *sm_info, +u32 nvgpu_gr_config_get_sm_info_gpc_index(struct nvgpu_sm_info *sm_info); +void nvgpu_gr_config_set_sm_info_gpc_index(struct nvgpu_sm_info *sm_info, u32 gpc_index); -u32 nvgpu_gr_config_get_sm_info_tpc_index(struct sm_info *sm_info); -void nvgpu_gr_config_set_sm_info_tpc_index(struct sm_info *sm_info, +u32 nvgpu_gr_config_get_sm_info_tpc_index(struct nvgpu_sm_info *sm_info); +void nvgpu_gr_config_set_sm_info_tpc_index(struct nvgpu_sm_info *sm_info, u32 tpc_index); -u32 nvgpu_gr_config_get_sm_info_global_tpc_index(struct sm_info *sm_info); -void nvgpu_gr_config_set_sm_info_global_tpc_index(struct sm_info *sm_info, +u32 nvgpu_gr_config_get_sm_info_global_tpc_index(struct nvgpu_sm_info *sm_info); +void nvgpu_gr_config_set_sm_info_global_tpc_index(struct nvgpu_sm_info *sm_info, u32 global_tpc_index); -u32 nvgpu_gr_config_get_sm_info_sm_index(struct sm_info *sm_info); -void nvgpu_gr_config_set_sm_info_sm_index(struct sm_info *sm_info, +u32 nvgpu_gr_config_get_sm_info_sm_index(struct nvgpu_sm_info *sm_info); +void nvgpu_gr_config_set_sm_info_sm_index(struct nvgpu_sm_info *sm_info, u32 sm_index); #endif /* NVGPU_GR_CONFIG_H */ diff --git a/drivers/gpu/nvgpu/os/linux/ioctl_ctrl.c b/drivers/gpu/nvgpu/os/linux/ioctl_ctrl.c index f560a650c..ea5e9ea04 100644 --- a/drivers/gpu/nvgpu/os/linux/ioctl_ctrl.c +++ b/drivers/gpu/nvgpu/os/linux/ioctl_ctrl.c @@ -833,7 +833,7 @@ static int gk20a_ctrl_vsm_mapping(struct gk20a *g, return -ENOMEM; for (i = 0; i < no_of_sm; i++) { - struct sm_info *sm_info = + struct nvgpu_sm_info *sm_info = nvgpu_gr_config_get_sm_info(gr->config, i); vsms_buf[i].gpc_index =