From 3b2b225c73b692c764ae11db418929f9f8fbcbef Mon Sep 17 00:00:00 2001 From: Rajesh Devaraj Date: Mon, 28 Nov 2022 11:39:29 +0000 Subject: [PATCH] gpu: nvgpu: update pmu_early_init Move the setting of power features related enable flags to separate static function. Invoke this function when PMU is not supported. JIRA NVGPU-9283 Change-Id: I429504c09d40c2cb115fce7550555f06b1e384ed Signed-off-by: Rajesh Devaraj Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2817658 Reviewed-by: svcacv Reviewed-by: svc-mobile-coverity Reviewed-by: Mahantesh Kumbar Reviewed-by: svc-mobile-cert Reviewed-by: Ramalingam C Reviewed-by: Ankur Kishore GVS: Gerrit_Virtual_Submit --- drivers/gpu/nvgpu/common/fifo/engines.c | 6 ++-- drivers/gpu/nvgpu/common/pmu/pmu.c | 38 ++++++++++++++++--------- 2 files changed, 28 insertions(+), 16 deletions(-) diff --git a/drivers/gpu/nvgpu/common/fifo/engines.c b/drivers/gpu/nvgpu/common/fifo/engines.c index 2e91d6c22..b545d8e33 100644 --- a/drivers/gpu/nvgpu/common/fifo/engines.c +++ b/drivers/gpu/nvgpu/common/fifo/engines.c @@ -222,9 +222,11 @@ int nvgpu_engine_disable_activity(struct gk20a *g, } #ifdef CONFIG_NVGPU_LS_PMU - if (g->ops.pmu.is_pmu_supported(g)) { - mutex_ret = nvgpu_pmu_lock_acquire(g, g->pmu, + if (g->ops.pmu.is_pmu_supported != NULL) { + if (g->ops.pmu.is_pmu_supported(g)) { + mutex_ret = nvgpu_pmu_lock_acquire(g, g->pmu, PMU_MUTEX_ID_FIFO, &token); + } } #endif diff --git a/drivers/gpu/nvgpu/common/pmu/pmu.c b/drivers/gpu/nvgpu/common/pmu/pmu.c index 35fbb8411..0e87cd5c1 100644 --- a/drivers/gpu/nvgpu/common/pmu/pmu.c +++ b/drivers/gpu/nvgpu/common/pmu/pmu.c @@ -162,6 +162,24 @@ void nvgpu_pmu_remove_support(struct gk20a *g, struct nvgpu_pmu *pmu) } } +static void nvgpu_pmu_disable_features(struct gk20a *g) +{ + g->support_ls_pmu = false; + + /* Disable LS PMU global checkers */ +#ifdef CONFIG_NVGPU_NON_FUSA + g->can_elpg = false; + g->elpg_enabled = false; + g->aelpg_enabled = false; + g->elpg_ms_enabled = false; +#endif + nvgpu_set_enabled(g, NVGPU_PMU_PERFMON, false); + nvgpu_set_enabled(g, NVGPU_ELPG_MS_ENABLED, false); +#ifdef CONFIG_NVGPU_DGPU + nvgpu_set_enabled(g, NVGPU_PMU_PSTATE, false); +#endif +} + /* PMU unit init */ int nvgpu_pmu_early_init(struct gk20a *g) { @@ -170,6 +188,11 @@ int nvgpu_pmu_early_init(struct gk20a *g) nvgpu_log_fn(g, " "); + if (g->ops.pmu.is_pmu_supported == NULL) { + nvgpu_pmu_disable_features(g); + goto exit; + } + if (g->pmu != NULL) { /* skip alloc/reinit for unrailgate sequence */ nvgpu_pmu_dbg(g, "skip pmu init for unrailgate sequence"); @@ -208,20 +231,7 @@ int nvgpu_pmu_early_init(struct gk20a *g) } if (!g->ops.pmu.is_pmu_supported(g)) { - g->support_ls_pmu = false; - - /* Disable LS PMU global checkers */ -#ifdef CONFIG_NVGPU_NON_FUSA - g->can_elpg = false; - g->elpg_enabled = false; - g->aelpg_enabled = false; - g->elpg_ms_enabled = false; -#endif - nvgpu_set_enabled(g, NVGPU_PMU_PERFMON, false); - nvgpu_set_enabled(g, NVGPU_ELPG_MS_ENABLED, false); -#ifdef CONFIG_NVGPU_DGPU - nvgpu_set_enabled(g, NVGPU_PMU_PSTATE, false); -#endif + nvgpu_pmu_disable_features(g); goto exit; }