From 3b4cf653c0262e2d2199a46c2922259f3f74a8e4 Mon Sep 17 00:00:00 2001 From: Nicolas Benech Date: Tue, 23 Jul 2019 19:58:13 -0400 Subject: [PATCH] gpu: nvgpu: do not compile hal_regops for safety build A number of hal_regops needed to be removed for FUSA. JIRA NVGPU-3690 Change-Id: Ib16bdef3af5b08a1c65706e17ae750c4db88825d Signed-off-by: Nicolas Benech Reviewed-on: https://git-master.nvidia.com/r/2161380 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/Makefile | 6 +++--- drivers/gpu/nvgpu/Makefile.sources | 6 +++--- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/nvgpu/Makefile b/drivers/gpu/nvgpu/Makefile index 789e14bf2..e3980c1f8 100644 --- a/drivers/gpu/nvgpu/Makefile +++ b/drivers/gpu/nvgpu/Makefile @@ -227,10 +227,7 @@ nvgpu-y += \ hal/power_features/cg/gv100_gating_reglist.o \ hal/power_features/cg/gv11b_gating_reglist.o \ hal/power_features/cg/tu104_gating_reglist.o \ - hal/regops/regops_gp10b.o \ - hal/regops/regops_gv100.o \ hal/regops/regops_gv11b.o \ - hal/regops/regops_tu104.o \ hal/ce/ce2_gk20a.o \ hal/therm/therm_gp10b.o \ hal/therm/therm_tu104.o \ @@ -690,6 +687,9 @@ nvgpu-$(CONFIG_NVGPU_HAL_NON_FUSA) += \ hal/power_features/cg/gm20b_gating_reglist.o \ hal/priv_ring/priv_ring_gm20b.o \ hal/regops/regops_gm20b.o \ + hal/regops/regops_gp10b.o \ + hal/regops/regops_gv100.o \ + hal/regops/regops_tu104.o \ hal/therm/therm_gm20b.o \ hal/top/top_gm20b.o diff --git a/drivers/gpu/nvgpu/Makefile.sources b/drivers/gpu/nvgpu/Makefile.sources index 750b76982..dc4b1e3bc 100644 --- a/drivers/gpu/nvgpu/Makefile.sources +++ b/drivers/gpu/nvgpu/Makefile.sources @@ -352,10 +352,7 @@ srcs += common/debugger.c \ common/regops/regops.c \ common/gr/hwpm_map.c \ common/perf/perfbuf.c \ - hal/regops/regops_gp10b.c \ hal/regops/regops_gv11b.c \ - hal/regops/regops_gv100.c \ - hal/regops/regops_tu104.c \ hal/gr/ctxsw_prog/ctxsw_prog_gm20b_dbg.c \ hal/gr/hwpm_map/hwpm_map_gv100.c \ hal/ltc/ltc_gm20b_dbg.c \ @@ -368,6 +365,9 @@ srcs += common/debugger.c \ hal/gr/gr/gr_tu104.c ifeq ($(CONFIG_NVGPU_HAL_NON_FUSA),1) srcs += hal/regops/regops_gm20b.c \ + hal/regops/regops_gp10b.c \ + hal/regops/regops_gv100.c \ + hal/regops/regops_tu104.c \ hal/perf/perf_gm20b.c endif endif