From 3c83b44544f7c6ef6e203fbeb94ffd2ad1496610 Mon Sep 17 00:00:00 2001 From: Philip Elcan Date: Thu, 28 Mar 2019 16:23:24 -0400 Subject: [PATCH] gpu: nvgpu: regops: fix MISRA 10.3 violations MISRA Rule 10.3 prohibits assignment of objects of different essential or narrower type. This fixes a number of MISRA 10.3 violations in the common/regops unit. JIRA: NVGPU-3023 Change-Id: Iee51780f8a570de79ae7a5e23517a48b2da51fef Signed-off-by: Philip Elcan Reviewed-on: https://git-master.nvidia.com/r/2084206 Reviewed-by: svc-mobile-coverity Reviewed-by: svc-mobile-misra Reviewed-by: svc-misra-checker Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Alex Waterman GVS: Gerrit_Virtual_Submit Reviewed-by: Adeel Raza Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/common/regops/regops.c | 14 +++++--------- 1 file changed, 5 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/nvgpu/common/regops/regops.c b/drivers/gpu/nvgpu/common/regops/regops.c index 4bd953d9d..72c8a6ea2 100644 --- a/drivers/gpu/nvgpu/common/regops/regops.c +++ b/drivers/gpu/nvgpu/common/regops/regops.c @@ -45,9 +45,9 @@ static int regop_bsearch_range_cmp(const void *pkey, const void *pelem) return 1; } -static inline bool linear_search(u32 offset, const u32 *list, int size) +static inline bool linear_search(u32 offset, const u32 *list, u64 size) { - int i; + u64 i; for (i = 0; i < size; i++) { if (list[i] == offset) { return true; @@ -68,17 +68,13 @@ static inline bool linear_search(u32 offset, const u32 *list, int size) */ static bool gr_context_info_available(struct gr_gk20a *gr) { - int err; + bool initialized; nvgpu_mutex_acquire(&gr->ctx_mutex); - err = !gr->ctx_vars.golden_image_initialized; + initialized = gr->ctx_vars.golden_image_initialized; nvgpu_mutex_release(&gr->ctx_mutex); - if (err != 0) { - return false; - } - - return true; + return initialized; } static bool validate_reg_ops(struct gk20a *g,