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gpu: nvgpu: change init_pbdma_map to void function

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Fix MISRA Rule 17.7. Change init_pbdma_map fn pointer
to return void.

JIRA NVGPU-3383

Change-Id: Id76522c22a9c85ccafff8bd7f9a93cab139f56d5
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2113212
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Seema Khowala
2019-05-06 15:09:10 -07:00
committed by mobile promotions
parent 045d210bb8
commit 3df5e43f53
3 changed files with 3 additions and 5 deletions
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4
drivers/gpu/nvgpu/hal/fifo/fifo_gk20a.c
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@@ -90,15 +90,13 @@ void gk20a_fifo_bar1_snooping_disable(struct gk20a *g)
fifo_bar1_base_valid_false_f()); fifo_bar1_base_valid_false_f());
} }
int gk20a_fifo_init_pbdma_map(struct gk20a *g, u32 *pbdma_map, u32 num_pbdma) void gk20a_fifo_init_pbdma_map(struct gk20a *g, u32 *pbdma_map, u32 num_pbdma)
{ {
u32 id; u32 id;
for (id = 0U; id < num_pbdma; ++id) { for (id = 0U; id < num_pbdma; ++id) {
pbdma_map[id] = nvgpu_readl(g, fifo_pbdma_map_r(id)); pbdma_map[id] = nvgpu_readl(g, fifo_pbdma_map_r(id));
} }
return 0U;
} }
u32 gk20a_fifo_get_runlist_timeslice(struct gk20a *g) u32 gk20a_fifo_get_runlist_timeslice(struct gk20a *g)

2
drivers/gpu/nvgpu/hal/fifo/fifo_gk20a.h
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@@ -29,7 +29,7 @@
int gk20a_init_fifo_reset_enable_hw(struct gk20a *g); int gk20a_init_fifo_reset_enable_hw(struct gk20a *g);
int gk20a_init_fifo_setup_hw(struct gk20a *g); int gk20a_init_fifo_setup_hw(struct gk20a *g);
void gk20a_fifo_bar1_snooping_disable(struct gk20a *g); void gk20a_fifo_bar1_snooping_disable(struct gk20a *g);
int gk20a_fifo_init_pbdma_map(struct gk20a *g, u32 *pbdma_map, u32 num_pbdma); void gk20a_fifo_init_pbdma_map(struct gk20a *g, u32 *pbdma_map, u32 num_pbdma);
u32 gk20a_fifo_get_runlist_timeslice(struct gk20a *g); u32 gk20a_fifo_get_runlist_timeslice(struct gk20a *g);
u32 gk20a_fifo_get_pb_timeslice(struct gk20a *g); u32 gk20a_fifo_get_pb_timeslice(struct gk20a *g);

2
drivers/gpu/nvgpu/include/nvgpu/gk20a.h
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@@ -989,7 +989,7 @@ struct gpu_ops {
u32 id, unsigned int id_type); u32 id, unsigned int id_type);
int (*preempt_poll_pbdma)(struct gk20a *g, u32 tsgid, int (*preempt_poll_pbdma)(struct gk20a *g, u32 tsgid,
u32 pbdma_id); u32 pbdma_id);
int (*init_pbdma_map)(struct gk20a *g, void (*init_pbdma_map)(struct gk20a *g,
u32 *pbdma_map, u32 num_pbdma); u32 *pbdma_map, u32 num_pbdma);
int (*is_preempt_pending)(struct gk20a *g, u32 id, int (*is_preempt_pending)(struct gk20a *g, u32 id,
unsigned int id_type); unsigned int id_type);