diff --git a/drivers/gpu/nvgpu/include/nvgpu/posix/posix-fault-injection.h b/drivers/gpu/nvgpu/include/nvgpu/posix/posix-fault-injection.h
index 9d64435e1..fcdb1b689 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/posix/posix-fault-injection.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/posix/posix-fault-injection.h
@@ -29,6 +29,7 @@
 struct nvgpu_posix_fault_inj {
 	bool enabled;
 	unsigned int counter;
+	unsigned long bitmask;
 };
 
 /**
@@ -180,4 +181,30 @@ bool nvgpu_posix_is_fault_injection_cntr_set(struct nvgpu_posix_fault_inj *fi);
  */
 bool nvgpu_posix_fault_injection_handle_call(struct nvgpu_posix_fault_inj *fi);
 
+/**
+ * nvgpu_posix_set_fault_injection - Set fault injection bitmask for the given
+ *				     object @fi with @bitmask and @number of
+ * 				     times fi is needed. For example a bitmask
+ * 				     0x12 and number as 6 will inject fault at
+ * 				     2nd and 5th iteration. Currently it only
+ * 				     supports upto 64 counter with bitmask. In
+ *                                   future an array of bitmask can be passed
+ *                                   and only implementation of this function
+ *                                   need to be changed.
+ *
+ * @fi - pointer to the fault_inj object.
+ * @bitmask - Call Interation to be faulted in bitmask format.
+ * @number - Fault injection supported upto <number> count.
+ */
+void nvgpu_posix_set_fault_injection_bitmask(struct nvgpu_posix_fault_inj *fi,
+	unsigned long *bitmask, unsigned int number);
+
+/**
+ * nvgpu_posix_fault_injection_handle_call - Reset the bitmask fi.
+ *
+ * @fi - pointer to the fault_inj object
+ *
+ */
+void nvgpu_posix_reset_fault_injection_bitmask(struct nvgpu_posix_fault_inj *fi);
+
 #endif /* NVGPU_POSIX_FAULT_INJECTION_H */
diff --git a/drivers/gpu/nvgpu/os/posix/posix-fault-injection.c b/drivers/gpu/nvgpu/os/posix/posix-fault-injection.c
index c6f9030d8..47d621677 100644
--- a/drivers/gpu/nvgpu/os/posix/posix-fault-injection.c
+++ b/drivers/gpu/nvgpu/os/posix/posix-fault-injection.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2018-2020, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -59,6 +59,21 @@ bool nvgpu_posix_is_fault_injection_cntr_set(struct nvgpu_posix_fault_inj *fi)
 	return (fi->counter > 0U);
 }
 
+void nvgpu_posix_set_fault_injection_bitmask(struct nvgpu_posix_fault_inj *fi,
+	unsigned long *bitmask, unsigned int number)
+{
+/* TODO check for input validity */
+
+	fi->bitmask = *bitmask;
+	fi->counter = number;
+}
+
+void nvgpu_posix_reset_fault_injection_bitmask(struct nvgpu_posix_fault_inj *fi)
+{
+	fi->bitmask = 0UL;
+	fi->counter = 0U;
+}
+
 /*
  * Return status of fault injection.
  * Decrement fault injection count for each call.
@@ -67,6 +82,16 @@ bool nvgpu_posix_fault_injection_handle_call(struct nvgpu_posix_fault_inj *fi)
 {
 	bool current_state = fi->enabled;
 
+	if (fi->bitmask != 0UL && fi->counter > 0U &&
+		fi->counter <= sizeof(fi->bitmask) * 8) {
+		fi->counter--;
+		if ((1UL << fi->counter) & fi->bitmask) {
+			return true;
+		} else {
+			return false;
+		}
+	}
+
 	if (fi->counter > 0U) {
 		fi->counter--;
 		if (fi->counter == 0U) {