diff --git a/drivers/gpu/nvgpu/common/pmu/fw/fw_ns_bootstrap.c b/drivers/gpu/nvgpu/common/pmu/fw/fw_ns_bootstrap.c
index 899b34846..ccbb77dd1 100644
--- a/drivers/gpu/nvgpu/common/pmu/fw/fw_ns_bootstrap.c
+++ b/drivers/gpu/nvgpu/common/pmu/fw/fw_ns_bootstrap.c
@@ -107,6 +107,10 @@ int nvgpu_pmu_ns_fw_bootstrap(struct gk20a *g, struct nvgpu_pmu *pmu)
 	pmu->fw->ops.set_cmd_line_args_cpu_freq(pmu,
 		g->ops.clk.get_rate(g, CTRL_CLK_DOMAIN_PWRCLK));
 
+	if (pmu->fw->ops.config_cmd_line_args_super_surface != NULL) {
+		pmu->fw->ops.config_cmd_line_args_super_surface(pmu);
+	}
+
 	nvgpu_pmu_fw_get_cmd_line_args_offset(g, &args_offset);
 
 	err = nvgpu_falcon_copy_to_dmem(pmu->flcn, args_offset,
diff --git a/drivers/gpu/nvgpu/common/pmu/super_surface/super_surface.c b/drivers/gpu/nvgpu/common/pmu/super_surface/super_surface.c
index 27ff7330d..73670b3c3 100644
--- a/drivers/gpu/nvgpu/common/pmu/super_surface/super_surface.c
+++ b/drivers/gpu/nvgpu/common/pmu/super_surface/super_surface.c
@@ -32,6 +32,7 @@ int nvgpu_pmu_super_surface_buf_alloc(struct gk20a *g, struct nvgpu_pmu *pmu,
 {
 	struct vm_gk20a *vm = g->mm.pmu.vm;
 	int err = 0;
+	u32 tmp = 0;
 
 	nvgpu_log_fn(g, " ");
 
@@ -43,8 +44,22 @@ int nvgpu_pmu_super_surface_buf_alloc(struct gk20a *g, struct nvgpu_pmu *pmu,
 		&ss->super_surface_buf);
 	if (err != 0) {
 		nvgpu_err(g, "failed to allocate pmu suffer surface\n");
+		return err;
 	}
 
+	/* store the gpu_va in super-surface header for PMU ucode to access */
+	tmp = u64_lo32(ss->super_surface_buf.gpu_va);
+	nvgpu_mem_wr_n(g, nvgpu_pmu_super_surface_mem(g,
+		pmu, pmu->super_surface),
+		(u64)offsetof(struct super_surface, hdr.data.address.lo),
+		&tmp, sizeof(u32));
+
+	tmp = u64_hi32(ss->super_surface_buf.gpu_va);
+	nvgpu_mem_wr_n(g, nvgpu_pmu_super_surface_mem(g,
+		pmu, pmu->super_surface),
+		(u64)offsetof(struct super_surface, hdr.data.address.hi),
+		&tmp, sizeof(u32));
+
 	return err;
 }