diff --git a/drivers/gpu/nvgpu/common/linux/dmabuf.h b/drivers/gpu/nvgpu/common/linux/dmabuf.h
index 718386c5b..b4b614590 100644
--- a/drivers/gpu/nvgpu/common/linux/dmabuf.h
+++ b/drivers/gpu/nvgpu/common/linux/dmabuf.h
@@ -70,4 +70,7 @@ int gk20a_dmabuf_alloc_drvdata(struct dma_buf *dmabuf, struct device *dev);
 int gk20a_dmabuf_get_state(struct dma_buf *dmabuf, struct gk20a *g,
 			   u64 offset, struct gk20a_buffer_state **state);
 
+int gk20a_mm_get_buffer_info(struct device *dev, int dmabuf_fd,
+			     u64 *buffer_id, u64 *buffer_len);
+
 #endif
diff --git a/drivers/gpu/nvgpu/common/linux/ioctl_ctrl.c b/drivers/gpu/nvgpu/common/linux/ioctl_ctrl.c
index 6c9fc26f2..1e5a9d59f 100644
--- a/drivers/gpu/nvgpu/common/linux/ioctl_ctrl.c
+++ b/drivers/gpu/nvgpu/common/linux/ioctl_ctrl.c
@@ -43,6 +43,7 @@
 #include "gk20a/fence_gk20a.h"
 
 #include "os_linux.h"
+#include "dmabuf.h"
 
 #define HZ_TO_MHZ(a) ((a > 0xF414F9CD7ULL) ? 0xffff : (a >> 32) ? \
 	(u32) ((a * 0x10C8ULL) >> 32) : (u16) ((u32) a/MHZ))
diff --git a/drivers/gpu/nvgpu/common/linux/os_linux.h b/drivers/gpu/nvgpu/common/linux/os_linux.h
index 9bb9e9f41..07be7edcb 100644
--- a/drivers/gpu/nvgpu/common/linux/os_linux.h
+++ b/drivers/gpu/nvgpu/common/linux/os_linux.h
@@ -13,10 +13,12 @@
  * You should have received a copy of the GNU General Public License
  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  */
+
 #ifndef NVGPU_OS_LINUX_H
 #define NVGPU_OS_LINUX_H
 
 #include <linux/cdev.h>
+#include <linux/iommu.h>
 
 #ifdef CONFIG_TEGRA_19x_GPU
 #include <nvgpu/linux/os_linux_t19x.h>
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
index 3c3ddc80a..1ea59a9db 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
@@ -7980,14 +7980,6 @@ int __gr_gk20a_exec_ctx_ops(struct channel_gk20a *ch,
 			ctx_op_nr++;
 		}
 	}
-#if 0
-	/* flush cpu caches for the ctx buffer? only if cpu cached, of course.
-	 * they aren't, yet */
-	if (cached) {
-		FLUSH_CPU_DCACHE(ctx_ptr,
-			 sg_phys(ch_ctx->gr_ctx.mem.ref), size);
-	}
-#endif
 
  cleanup:
 	if (offsets)
diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.h b/drivers/gpu/nvgpu/gk20a/mm_gk20a.h
index 434fc4228..183d62117 100644
--- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/mm_gk20a.h
@@ -21,14 +21,10 @@
  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  * DEALINGS IN THE SOFTWARE.
  */
+
 #ifndef MM_GK20A_H
 #define MM_GK20A_H
 
-#include <linux/scatterlist.h>
-#include <linux/iommu.h>
-#include <asm/dma-iommu.h>
-#include <asm/cacheflush.h>
-
 #include <nvgpu/nvgpu_mem.h>
 #include <nvgpu/allocator.h>
 #include <nvgpu/vm.h>
@@ -36,17 +32,6 @@
 #include <nvgpu/rbtree.h>
 #include <nvgpu/kref.h>
 
-#ifdef CONFIG_ARM64
-#define outer_flush_range(a, b)
-#define __cpuc_flush_dcache_area __flush_dcache_area
-#endif
-
-#define FLUSH_CPU_DCACHE(va, pa, size)	\
-	do {	\
-		__cpuc_flush_dcache_area((void *)(va), (size_t)(size));	\
-		outer_flush_range(pa, pa + (size_t)(size));		\
-	} while (0)
-
 struct gpfifo_desc {
 	struct nvgpu_mem mem;
 	u32 entry_num;
@@ -198,7 +183,4 @@ void gk20a_mm_init_pdb(struct gk20a *g, struct nvgpu_mem *mem,
 extern const struct gk20a_mmu_level gk20a_mm_levels_64k[];
 extern const struct gk20a_mmu_level gk20a_mm_levels_128k[];
 
-int gk20a_mm_get_buffer_info(struct device *dev, int dmabuf_fd,
-			     u64 *buffer_id, u64 *buffer_len);
-
 #endif /* MM_GK20A_H */
diff --git a/drivers/gpu/nvgpu/gk20a/sim_gk20a.c b/drivers/gpu/nvgpu/gk20a/sim_gk20a.c
index 7eb0aafe5..34ca5add6 100644
--- a/drivers/gpu/nvgpu/gk20a/sim_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/sim_gk20a.c
@@ -24,11 +24,12 @@
 #include <linux/highmem.h>
 #include <linux/platform_device.h>
 
+#include <nvgpu/log.h>
+#include <nvgpu/linux/vm.h>
+
 #include "gk20a.h"
 #include "platform_gk20a.h"
 
-#include <nvgpu/log.h>
-
 #include <nvgpu/hw/gk20a/hw_sim_gk20a.h>
 
 static inline void sim_writel(struct gk20a *g, u32 r, u32 v)
diff --git a/drivers/gpu/nvgpu/gp106/bios_gp106.c b/drivers/gpu/nvgpu/gp106/bios_gp106.c
index a5a244e80..9d75249dd 100644
--- a/drivers/gpu/nvgpu/gp106/bios_gp106.c
+++ b/drivers/gpu/nvgpu/gp106/bios_gp106.c
@@ -20,6 +20,8 @@
  * DEALINGS IN THE SOFTWARE.
  */
 
+#include <linux/pci_ids.h>
+
 #include <nvgpu/bios.h>
 #include <nvgpu/kmem.h>
 #include <nvgpu/nvgpu_common.h>
@@ -248,4 +250,3 @@ free_firmware:
 		nvgpu_vfree(g, g->bios.data);
 	return err;
 }
-
diff --git a/drivers/gpu/nvgpu/gp106/mclk_gp106.c b/drivers/gpu/nvgpu/gp106/mclk_gp106.c
index e058b02fd..b7a2c91db 100644
--- a/drivers/gpu/nvgpu/gp106/mclk_gp106.c
+++ b/drivers/gpu/nvgpu/gp106/mclk_gp106.c
@@ -21,6 +21,7 @@
  */
 
 #include <linux/delay.h>
+#include <linux/pci_ids.h>
 
 #include <nvgpu/bios.h>
 #include <nvgpu/kmem.h>
diff --git a/drivers/gpu/nvgpu/include/nvgpu/linux/vm.h b/drivers/gpu/nvgpu/include/nvgpu/linux/vm.h
index 91f0cf096..7aacf496e 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/linux/vm.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/linux/vm.h
@@ -19,6 +19,18 @@
 
 #include <nvgpu/types.h>
 
+#include <asm/cacheflush.h>
+
+/*
+ * Couple of places explicitly flush caches still. Any DMA buffer we allocate
+ * from within the GPU is writecombine and as a result does not need this but
+ * there seem to be exceptions.
+ */
+#ifdef CONFIG_ARM64
+#define outer_flush_range(a, b)
+#define __cpuc_flush_dcache_area __flush_dcache_area
+#endif
+
 struct sg_table;
 struct dma_buf;