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gpu: nvgpu: refactor interrupt handling
JIRA: EVLR-1004 (*) Refactor the non-stalling interrupt path to execute clear on the top half, so on dGPU case processing of stalling interrupts does not block non-stalling one. (*) Use a worker thread to do semaphore wakeups and allow batching of the non-stalling operations. (*) Fix a bug where some gpus will not properly track the completion of interrupts, preventing safe driver unloads Change-Id: Icc90a3acba544c97ec6a9285ab235d337ab9eefa Signed-off-by: David Nieto <dmartineznie@nvidia.com> Reviewed-on: http://git-master/r/1312796 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Lakshmanan M <lm@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Navneet Kumar <navneetk@nvidia.com>
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@@ -214,7 +214,7 @@ int gk20a_init_fifo_support(struct gk20a *g);
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int gk20a_init_fifo_setup_hw(struct gk20a *g);
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void gk20a_fifo_isr(struct gk20a *g);
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void gk20a_fifo_nonstall_isr(struct gk20a *g);
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int gk20a_fifo_nonstall_isr(struct gk20a *g);
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int gk20a_fifo_preempt_channel(struct gk20a *g, u32 hw_chid);
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int gk20a_fifo_preempt_tsg(struct gk20a *g, u32 tsgid);
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