From 439d3eb74f4221551dfa3eb6ca91a1bbc9a058cc Mon Sep 17 00:00:00 2001 From: Konsta Holtta Date: Mon, 15 Oct 2018 14:49:52 +0300 Subject: [PATCH] gpu: nvgpu: use a pointer for ch_state inst mem MISRA rule 18.7 doesn't allow flexible array members. To work around that, modify the instance block member in struct ch_state to be an explicit pointer and allocate it separately for simplicity. Jira NVGPU-886 Change-Id: I34299bec79bf7706f9cdfa42dee7fba765c9f312 Signed-off-by: Konsta Holtta Reviewed-on: https://git-master.nvidia.com/r/1928205 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | 19 +++++++++++++------ drivers/gpu/nvgpu/gk20a/fifo_gk20a.h | 2 +- drivers/gpu/nvgpu/gv11b/fifo_gv11b.c | 2 +- 3 files changed, 15 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c index e53f4eefb..cf6448032 100644 --- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c @@ -4081,7 +4081,7 @@ void gk20a_dump_channel_status_ramfc(struct gk20a *g, return; } - inst_mem = &ch_state->inst_block[0]; + inst_mem = ch_state->inst_block; syncpointa = inst_mem[ram_fc_syncpointa_w()]; syncpointb = inst_mem[ram_fc_syncpointb_w()]; @@ -4155,13 +4155,19 @@ void gk20a_debug_dump_all_channel_status_ramfc(struct gk20a *g, for (chid = 0; chid < f->num_channels; chid++) { struct channel_gk20a *ch = &f->channel[chid]; if (gk20a_channel_get(ch)) { - ch_state[chid] = - nvgpu_kmalloc(g, sizeof(struct ch_state) + - ram_in_alloc_size_v()); + struct ch_state *state = nvgpu_kmalloc(g, + sizeof(*state)); + u32 *inst = nvgpu_kmalloc(g, ram_in_alloc_size_v()); + /* ref taken stays to below loop with * successful allocs */ - if (ch_state[chid] == NULL) { + if (state == NULL || inst == NULL) { gk20a_channel_put(ch); + nvgpu_kfree(g, state); + nvgpu_kfree(g, inst); + } else { + ch_state[chid] = state; + ch_state[chid]->inst_block = inst; } } } @@ -4176,7 +4182,7 @@ void gk20a_debug_dump_all_channel_status_ramfc(struct gk20a *g, ch_state[chid]->refs = nvgpu_atomic_read(&ch->ref_count); ch_state[chid]->deterministic = ch->deterministic; nvgpu_mem_rd_n(g, &ch->inst_block, 0, - &ch_state[chid]->inst_block[0], + ch_state[chid]->inst_block, ram_in_alloc_size_v()); gk20a_channel_put(ch); } @@ -4184,6 +4190,7 @@ void gk20a_debug_dump_all_channel_status_ramfc(struct gk20a *g, if (ch_state[chid]) { g->ops.fifo.dump_channel_status_ramfc(g, o, chid, ch_state[chid]); + nvgpu_kfree(g, ch_state[chid]->inst_block); nvgpu_kfree(g, ch_state[chid]); } } diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h index 611e6662e..27fde3c52 100644 --- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h @@ -221,7 +221,7 @@ struct ch_state { int pid; int refs; bool deterministic; - u32 inst_block[0]; + u32 *inst_block; }; int gk20a_init_fifo_support(struct gk20a *g); diff --git a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c index 14c76332c..0bb319859 100644 --- a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c @@ -313,7 +313,7 @@ void gv11b_dump_channel_status_ramfc(struct gk20a *g, return; } - inst_mem = &ch_state->inst_block[0]; + inst_mem = ch_state->inst_block; gk20a_debug_output(o, "%d-%s, TSG: %u, pid %d, refs: %d: ", chid, g->name,