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gpu: nvgpu: Fix nvgpu_sim_esc_readl MISRA 17.7 violations
MISRA Rule-17.7 requires the return value of all functions to be used. Fix is either to use the return value or change the function to return void. This patch contains fix for calls to nvgpu_sim_esc_readl by changing its return to void and printing an error message instead. JIRA NVGPU-677 Change-Id: I949bea253dafc316c7dfbf870eb1225b6fc5b9c3 Signed-off-by: Nicolas Benech <nbenech@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1812887 Reviewed-by: Alex Waterman <alexw@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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@@ -28,6 +28,7 @@
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#include <nvgpu/hw_sim.h>
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#include <nvgpu/hw_sim.h>
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#include <nvgpu/sim.h>
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#include <nvgpu/sim.h>
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#include <nvgpu/utils.h>
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#include <nvgpu/utils.h>
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#include <nvgpu/bug.h>
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#include "gk20a/gk20a.h"
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#include "gk20a/gk20a.h"
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@@ -215,7 +216,7 @@ static int issue_rpc_and_wait(struct gk20a *g)
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return 0;
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return 0;
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}
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}
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static int nvgpu_sim_esc_readl(struct gk20a *g,
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static void nvgpu_sim_esc_readl(struct gk20a *g,
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char *path, u32 index, u32 *data)
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char *path, u32 index, u32 *data)
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{
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{
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int err;
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int err;
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@@ -232,9 +233,12 @@ static int nvgpu_sim_esc_readl(struct gk20a *g,
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err = issue_rpc_and_wait(g);
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err = issue_rpc_and_wait(g);
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if (!err)
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if (err == 0) {
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memcpy(data, sim_msg_param(g, data_offset), sizeof(u32));
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memcpy(data, sim_msg_param(g, data_offset), sizeof(u32));
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return err;
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} else {
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*data = 0xffffffff;
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WARN(1, "issue_rpc_and_wait failed err=%d", err);
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}
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}
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}
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static void nvgpu_sim_init_late(struct gk20a *g)
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static void nvgpu_sim_init_late(struct gk20a *g)
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@@ -27,6 +27,7 @@
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#include <nvgpu/sim.h>
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#include <nvgpu/sim.h>
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#include <nvgpu/io.h>
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#include <nvgpu/io.h>
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#include <nvgpu/utils.h>
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#include <nvgpu/utils.h>
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#include <nvgpu/bug.h>
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#include "gk20a/gk20a.h"
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#include "gk20a/gk20a.h"
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@@ -183,7 +184,7 @@ static int issue_rpc_and_wait(struct gk20a *g)
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return 0;
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return 0;
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}
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}
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static int nvgpu_sim_esc_readl(struct gk20a *g,
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static void nvgpu_sim_esc_readl(struct gk20a *g,
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char *path, u32 index, u32 *data)
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char *path, u32 index, u32 *data)
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{
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{
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int err;
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int err;
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@@ -200,9 +201,12 @@ static int nvgpu_sim_esc_readl(struct gk20a *g,
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err = issue_rpc_and_wait(g);
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err = issue_rpc_and_wait(g);
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if (!err)
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if (err == 0) {
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memcpy(data, sim_msg_param(g, data_offset + 0xc), sizeof(u32));
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memcpy(data, sim_msg_param(g, data_offset + 0xc), sizeof(u32));
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return err;
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} else {
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*data = 0xffffffff;
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WARN(1, "issue_rpc_and_wait failed err=%d", err);
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}
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}
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}
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static void nvgpu_sim_init_late(struct gk20a *g)
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static void nvgpu_sim_init_late(struct gk20a *g)
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@@ -36,7 +36,7 @@ struct sim_nvgpu {
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struct nvgpu_mem msg_bfr;
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struct nvgpu_mem msg_bfr;
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void (*sim_init_late)(struct gk20a *);
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void (*sim_init_late)(struct gk20a *);
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void (*remove_support)(struct gk20a *);
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void (*remove_support)(struct gk20a *);
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int (*esc_readl)(
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void (*esc_readl)(
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struct gk20a *g, char *path, u32 index, u32 *data);
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struct gk20a *g, char *path, u32 index, u32 *data);
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};
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};
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#ifdef __KERNEL__
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#ifdef __KERNEL__
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