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gpu: nvgpu: vgpu: restructure vgpu clk implementation

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Move OS agnostic parts of vgpu clk code out of os/linux specific
path. This includes implementation sending rpc commands to
RM Server. Move Linux specific vgpu clk code to platform vgpu files
keeping it consistent with native implementation.

Bug 2363882
Jira EVLR-3254

Change-Id: I0aae014ef16415bb356c81e9bfd76bc65206d9fd
Signed-off-by: Aparna Das <aparnad@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1820674
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Aparna Das
2018-09-11 13:23:40 -07:00
committed by mobile promotions
parent c28e73ee2f
commit 46477494b2
7 changed files with 90 additions and 46 deletions
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168
drivers/gpu/nvgpu/os/linux/vgpu/clk_vgpu.c
View File

@@ -1,168 +0,0 @@
/*
* Virtualized GPU Clock Interface
*
* Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include <nvgpu/vgpu/vgpu.h>
#include "gk20a/gk20a.h"
#include "clk_vgpu.h"
#include "ctrl/ctrlclk.h"
#include "os/linux/platform_gk20a.h"
static unsigned long
vgpu_freq_table[TEGRA_VGPU_GPU_FREQ_TABLE_SIZE];
static unsigned long vgpu_clk_get_rate(struct gk20a *g, u32 api_domain)
{
struct tegra_vgpu_cmd_msg msg = {};
struct tegra_vgpu_gpu_clk_rate_params *p = &msg.params.gpu_clk_rate;
int err;
unsigned long ret = 0;
nvgpu_log_fn(g, " ");
switch (api_domain) {
case CTRL_CLK_DOMAIN_GPCCLK:
msg.cmd = TEGRA_VGPU_CMD_GET_GPU_CLK_RATE;
msg.handle = vgpu_get_handle(g);
err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg));
err = err ? err : msg.ret;
if (err)
nvgpu_err(g, "%s failed - %d", __func__, err);
else
/* return frequency in Hz */
ret = p->rate * 1000;
break;
case CTRL_CLK_DOMAIN_PWRCLK:
nvgpu_err(g, "unsupported clock: %u", api_domain);
break;
default:
nvgpu_err(g, "unknown clock: %u", api_domain);
break;
}
return ret;
}
static int vgpu_clk_set_rate(struct gk20a *g,
u32 api_domain, unsigned long rate)
{
struct tegra_vgpu_cmd_msg msg = {};
struct tegra_vgpu_gpu_clk_rate_params *p = &msg.params.gpu_clk_rate;
int err = -EINVAL;
nvgpu_log_fn(g, " ");
switch (api_domain) {
case CTRL_CLK_DOMAIN_GPCCLK:
msg.cmd = TEGRA_VGPU_CMD_SET_GPU_CLK_RATE;
msg.handle = vgpu_get_handle(g);
/* server dvfs framework requires frequency in kHz */
p->rate = (u32)(rate / 1000);
err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg));
err = err ? err : msg.ret;
if (err)
nvgpu_err(g, "%s failed - %d", __func__, err);
break;
case CTRL_CLK_DOMAIN_PWRCLK:
nvgpu_err(g, "unsupported clock: %u", api_domain);
break;
default:
nvgpu_err(g, "unknown clock: %u", api_domain);
break;
}
return err;
}
static unsigned long vgpu_clk_get_maxrate(struct gk20a *g, u32 api_domain)
{
struct vgpu_priv_data *priv = vgpu_get_priv_data(g);
return priv->constants.max_freq;
}
void vgpu_init_clk_support(struct gk20a *g)
{
g->ops.clk.get_rate = vgpu_clk_get_rate;
g->ops.clk.set_rate = vgpu_clk_set_rate;
g->ops.clk.get_maxrate = vgpu_clk_get_maxrate;
}
long vgpu_clk_round_rate(struct device *dev, unsigned long rate)
{
/* server will handle frequency rounding */
return rate;
}
int vgpu_clk_get_freqs(struct device *dev,
unsigned long **freqs, int *num_freqs)
{
struct gk20a_platform *platform = gk20a_get_platform(dev);
struct gk20a *g = platform->g;
struct tegra_vgpu_cmd_msg msg = {};
struct tegra_vgpu_get_gpu_freq_table_params *p =
&msg.params.get_gpu_freq_table;
unsigned int i;
int err;
nvgpu_log_fn(g, " ");
msg.cmd = TEGRA_VGPU_CMD_GET_GPU_FREQ_TABLE;
msg.handle = vgpu_get_handle(g);
p->num_freqs = TEGRA_VGPU_GPU_FREQ_TABLE_SIZE;
err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg));
err = err ? err : msg.ret;
if (err) {
nvgpu_err(g, "%s failed - %d", __func__, err);
return err;
}
/* return frequency in Hz */
for (i = 0; i < p->num_freqs; i++)
vgpu_freq_table[i] = p->freqs[i] * 1000;
*freqs = vgpu_freq_table;
*num_freqs = p->num_freqs;
return 0;
}
int vgpu_clk_cap_rate(struct device *dev, unsigned long rate)
{
struct gk20a_platform *platform = gk20a_get_platform(dev);
struct gk20a *g = platform->g;
struct tegra_vgpu_cmd_msg msg = {};
struct tegra_vgpu_gpu_clk_rate_params *p = &msg.params.gpu_clk_rate;
int err = 0;
nvgpu_log_fn(g, " ");
msg.cmd = TEGRA_VGPU_CMD_CAP_GPU_CLK_RATE;
msg.handle = vgpu_get_handle(g);
p->rate = (u32)rate;
err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg));
err = err ? err : msg.ret;
if (err) {
nvgpu_err(g, "%s failed - %d", __func__, err);
return err;
}
return 0;
}

7
drivers/gpu/nvgpu/os/linux/vgpu/gv11b/platform_gv11b_vgpu_tegra.c
View File

@@ -19,10 +19,11 @@
#include <nvgpu/nvhost.h>
#include "gk20a/gk20a.h"
#include "os/linux/vgpu/clk_vgpu.h"
#include "vgpu/clk_vgpu.h"
#include "os/linux/platform_gk20a.h"
#include "os/linux/os_linux.h"
#include "os/linux/vgpu/vgpu_linux.h"
#include "os/linux/vgpu/platform_vgpu_tegra.h"
static int gv11b_vgpu_probe(struct device *dev)
{
@@ -88,8 +89,8 @@ struct gk20a_platform gv11b_vgpu_tegra_platform = {
.probe = gv11b_vgpu_probe,
.clk_round_rate = vgpu_clk_round_rate,
.get_clk_freqs = vgpu_clk_get_freqs,
.clk_round_rate = vgpu_plat_clk_round_rate,
.get_clk_freqs = vgpu_plat_clk_get_freqs,
/* frequency scaling configuration */
.devfreq_governor = "userspace",

29
drivers/gpu/nvgpu/os/linux/vgpu/platform_vgpu_tegra.c
View File

@@ -20,7 +20,7 @@
#include "gk20a/gk20a.h"
#include "os/linux/platform_gk20a.h"
#include "clk_vgpu.h"
#include "vgpu/clk_vgpu.h"
#include "vgpu_linux.h"
static int gk20a_tegra_probe(struct device *dev)
@@ -40,6 +40,29 @@ static int gk20a_tegra_probe(struct device *dev)
#endif
}
long vgpu_plat_clk_round_rate(struct device *dev, unsigned long rate)
{
/* server will handle frequency rounding */
return rate;
}
int vgpu_plat_clk_get_freqs(struct device *dev, unsigned long **freqs,
int *num_freqs)
{
struct gk20a_platform *platform = gk20a_get_platform(dev);
struct gk20a *g = platform->g;
return vgpu_clk_get_freqs(g, freqs, num_freqs);
}
int vgpu_plat_clk_cap_rate(struct device *dev, unsigned long rate)
{
struct gk20a_platform *platform = gk20a_get_platform(dev);
struct gk20a *g = platform->g;
return vgpu_clk_cap_rate(g, rate);
}
struct gk20a_platform vgpu_tegra_platform = {
.has_syncpoints = true,
.aggressive_sync_destroy_thresh = 64,
@@ -60,8 +83,8 @@ struct gk20a_platform vgpu_tegra_platform = {
.probe = gk20a_tegra_probe,
.clk_round_rate = vgpu_clk_round_rate,
.get_clk_freqs = vgpu_clk_get_freqs,
.clk_round_rate = vgpu_plat_clk_round_rate,
.get_clk_freqs = vgpu_plat_clk_get_freqs,
/* frequency scaling configuration */
.devfreq_governor = "userspace",

17
drivers/gpu/nvgpu/os/linux/vgpu/clk_vgpu.h → drivers/gpu/nvgpu/os/linux/vgpu/platform_vgpu_tegra.h
View File

@@ -1,7 +1,5 @@
/*
* Virtualized GPU Clock Interface
*
* Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
@@ -16,12 +14,11 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef _CLK_VIRT_H_
#define _CLK_VIRT_H_
#ifndef _VGPU_PLATFORM_H_
#define _VGPU_PLATFORM_H_
void vgpu_init_clk_support(struct gk20a *g);
long vgpu_clk_round_rate(struct device *dev, unsigned long rate);
int vgpu_clk_get_freqs(struct device *dev,
unsigned long **freqs, int *num_freqs);
int vgpu_clk_cap_rate(struct device *dev, unsigned long rate);
long vgpu_plat_clk_round_rate(struct device *dev, unsigned long rate);
int vgpu_plat_clk_get_freqs(struct device *dev, unsigned long **freqs,
int *num_freqs);
int vgpu_plat_clk_cap_rate(struct device *dev, unsigned long rate);
#endif

8
drivers/gpu/nvgpu/os/linux/vgpu/vgpu_linux.c
View File

@@ -35,7 +35,7 @@
#include "vgpu_linux.h"
#include "vgpu/fecs_trace_vgpu.h"
#include "clk_vgpu.h"
#include "vgpu/clk_vgpu.h"
#include "gk20a/tsg_gk20a.h"
#include "gk20a/regops_gk20a.h"
#include "gm20b/hal_gm20b.h"
@@ -46,6 +46,7 @@
#include "os/linux/scale.h"
#include "os/linux/driver_common.h"
#include "os/linux/platform_gk20a.h"
#include "os/linux/vgpu/platform_vgpu_tegra.h"
struct vgpu_priv_data *vgpu_get_priv_data(struct gk20a *g)
{
@@ -244,7 +245,7 @@ static int vgpu_qos_notify(struct notifier_block *nb,
nvgpu_log_fn(g, " ");
max_freq = (u32)pm_qos_read_max_bound(PM_QOS_GPU_FREQ_BOUNDS);
err = vgpu_clk_cap_rate(profile->dev, max_freq);
err = vgpu_plat_clk_cap_rate(profile->dev, max_freq);
if (err)
nvgpu_err(g, "%s failed, err=%d", __func__, err);
@@ -286,6 +287,7 @@ static void vgpu_pm_qos_remove(struct device *dev)
static int vgpu_pm_init(struct device *dev)
{
struct gk20a *g = get_gk20a(dev);
struct gk20a_platform *platform = gk20a_get_platform(dev);
struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g);
unsigned long *freqs;
int num_freqs;
@@ -303,7 +305,7 @@ static int vgpu_pm_init(struct device *dev)
if (l->devfreq) {
/* set min/max frequency based on frequency table */
err = vgpu_clk_get_freqs(dev, &freqs, &num_freqs);
err = platform->get_clk_freqs(dev, &freqs, &num_freqs);
if (err)
return err;