diff --git a/userspace/units/cg/nvgpu-cg.c b/userspace/units/cg/nvgpu-cg.c
index 3d6269c91..f3671ccf5 100644
--- a/userspace/units/cg/nvgpu-cg.c
+++ b/userspace/units/cg/nvgpu-cg.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2019, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2019-2020, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -29,6 +29,7 @@
 #include <nvgpu/posix/io.h>
 #include <nvgpu/gk20a.h>
 #include <nvgpu/hw/gp10b/hw_fuse_gp10b.h>
+#include <nvgpu/hw/gv11b/hw_gr_gv11b.h>
 #include <nvgpu/hw/gv11b/hw_therm_gv11b.h>
 
 #include "hal/init/hal_gv11b.h"
@@ -314,6 +315,30 @@ static int init_test_env(struct unit_module *m, struct gk20a *g, void *args)
 		return UNIT_FAIL;
 	}
 
+	if (nvgpu_posix_io_add_reg_space(g,
+					 fuse_opt_ecc_en_r(), 0x4) != 0) {
+		unit_err(m, "Add reg space failed!\n");
+		return UNIT_FAIL;
+	}
+
+	if (nvgpu_posix_io_add_reg_space(g,
+		fuse_opt_feature_fuses_override_disable_r(), 0x4) != 0) {
+		unit_err(m, "Add reg space failed!\n");
+		return UNIT_FAIL;
+	}
+
+	if (nvgpu_posix_io_add_reg_space(g,
+			 gr_fecs_feature_override_ecc_r(), 0x4) != 0) {
+		unit_err(m, "Add reg space failed!\n");
+		return UNIT_FAIL;
+	}
+
+	if (nvgpu_posix_io_add_reg_space(g,
+			gr_fecs_feature_override_ecc_1_r(), 0x4) != 0) {
+		unit_err(m, "Add reg space failed!\n");
+		return UNIT_FAIL;
+	}
+
 	gv11b_init_hal(g);
 
 	init_blcg_fb_ltc_data(g);
diff --git a/userspace/units/fifo/nvgpu-fifo-common.c b/userspace/units/fifo/nvgpu-fifo-common.c
index 0a3c36c75..d386cf600 100644
--- a/userspace/units/fifo/nvgpu-fifo-common.c
+++ b/userspace/units/fifo/nvgpu-fifo-common.c
@@ -32,6 +32,10 @@
 #include <nvgpu/fifo/userd.h>
 #include <nvgpu/gk20a.h>
 
+#include <nvgpu/posix/io.h>
+
+#include <nvgpu/hw/gv11b/hw_gr_gv11b.h>
+
 #include "hal/init/hal_gv11b.h"
 
 #include "nvgpu-fifo-common.h"
@@ -138,6 +142,18 @@ int test_fifo_init_support(struct unit_module *m, struct gk20a *g, void *args)
 		goto fail;
 	}
 
+	if (nvgpu_posix_io_add_reg_space(g,
+			 gr_fecs_feature_override_ecc_r(), 0x4) != 0) {
+		unit_err(m, "Add reg space failed!\n");
+		return UNIT_FAIL;
+	}
+
+	if (nvgpu_posix_io_add_reg_space(g,
+			gr_fecs_feature_override_ecc_1_r(), 0x4) != 0) {
+		unit_err(m, "Add reg space failed!\n");
+		return UNIT_FAIL;
+	}
+
 	gv11b_init_hal(g);
 	g->ops.gr.init.get_no_of_sm = stub_gv11b_gr_init_get_no_of_sm;