gpu: nvgpu: vgpu: add SM exception support

When TEGRA_VGPU_GR_INTR_SM_EXCEPTION comes, post
debugger event.

Bug 1594604
JIRA VFND-1120

Change-Id: I7229c3994220a7c6f117d38a1af2e766187a47c6
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: http://git-master/r/923234
(cherry picked from commit bdd414d9366133380a202d88b1a50038b70c068d)
Reviewed-on: http://git-master/r/840646
Reviewed-by: Aingara Paramakuru <aparamakuru@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vladislav Buzov <vbuzov@nvidia.com>
This commit is contained in:
Richard Zhao
2015-12-02 11:35:08 -08:00
committed by Vladislav Buzov
parent 942936bae0
commit 476447ec55
2 changed files with 6 additions and 1 deletions

View File

@@ -317,7 +317,8 @@ enum {
TEGRA_VGPU_FIFO_INTR_MMU_FAULT,
TEGRA_VGPU_GR_NONSTALL_INTR_SEMAPHORE,
TEGRA_VGPU_FIFO_NONSTALL_INTR_CHANNEL,
TEGRA_VGPU_CE2_NONSTALL_INTR_NONBLOCKPIPE
TEGRA_VGPU_CE2_NONSTALL_INTR_NONBLOCKPIPE,
TEGRA_VGPU_GR_INTR_SM_EXCEPTION
};
struct tegra_vgpu_gr_intr_info {