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gpu: nvgpu: mm: limit recursion depth for pd levels

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The two MM functions nvgpu_set_pd_level() and nvgpu_vm_do_free_entries()
are simple recursive functions for processing page descriptors (PDs) by
traversing the levels in the PDs. MISRA Rule 17.2 prohibits functions
calling themselves because "unless recursion is tightly controlled, it
is not possible to determine before execution what the worst-case stack
usage could be." So, this change limits the recursion depth of each of
these functions to the maximum number of page table levels by checking
the level against the MM HAL max_page_table_levels().

This also required configuring this HAL in various unit tests as they
were no previously using this HAL.

JIRA NVGPU-3489

Change-Id: Iadee3fa5ba9f45cd643ac6c202e9296d75d51880
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2224450
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Philip Elcan
2019-10-23 15:27:10 -04:00
committed by Alex Waterman
parent cf8707e2b3
commit 49a620e48a
10 changed files with 15 additions and 0 deletions
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4
drivers/gpu/nvgpu/common/mm/vm.c
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@@ -185,8 +185,12 @@ static void nvgpu_vm_do_free_entries(struct vm_gk20a *vm,
struct nvgpu_gmmu_pd *pd,
u32 level)
{
struct gk20a *g = gk20a_from_vm(vm);
u32 i;
/* This limits recursion */
nvgpu_assert(level < g->ops.mm.gmmu.get_max_page_table_levels(g));
if (pd->mem != NULL) {
nvgpu_pd_free(vm, pd);
pd->mem = NULL;