nv-tegra-mirror/linux-nvgpu
1
0
Fork 0
mirror of git://nv-tegra.nvidia.com/linux-nvgpu.git synced 2025-12-22 17:36:20 +03:00
Code Issues Packages Projects Releases Wiki Activity

gpu: nvgpu: gk20a: Fix G_ELPG flush poll

Browse Source 
We poll completion of flush sequence by polling the broadcast
register. The polling should be done for a per-slice register
instead.

Bug 1457723

Change-Id: I10aba939175b6d05b05f5f26eebebcbe09d9b4a7
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/382521
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Tested-by: Juha Tukkinen <jtukkinen@nvidia.com>
This commit is contained in:
Terje Bergstrom
2014-03-17 14:51:55 +02:00
committed by Dan Willemsen
parent b5acc421ee
commit 4a8f0db379
4 changed files with 36 additions and 9 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
drivers/gpu/nvgpu/gk20a/gk20a.h
View File

@@ -73,6 +73,7 @@ struct gpu_ops {
int (*init_zbc)(struct gk20a *g, struct gr_gk20a *gr); int (*init_zbc)(struct gk20a *g, struct gr_gk20a *gr);
void (*init_cbc)(struct gk20a *g, struct gr_gk20a *gr); void (*init_cbc)(struct gk20a *g, struct gr_gk20a *gr);
void (*sync_debugfs)(struct gk20a *g); void (*sync_debugfs)(struct gk20a *g);
void (*init_fs_state)(struct gk20a *g);
void (*elpg_flush)(struct gk20a *g); void (*elpg_flush)(struct gk20a *g);
} ltc; } ltc;
struct { struct {
@@ -287,6 +288,8 @@ struct gk20a {
int irq_stall; int irq_stall;
int irq_nonstall; int irq_nonstall;
u32 max_ltc_count;
u32 ltc_count;
struct generic_pm_domain pd; struct generic_pm_domain pd;

24
drivers/gpu/nvgpu/gk20a/hw_ltc_gk20a.h
View File

@@ -198,19 +198,35 @@ static inline u32 ltc_ltcs_ltss_tstg_set_mgmt_2_l2_bypass_mode_enabled_f(void)
{ {
return 0x10000000; return 0x10000000;
} }
static inline u32 ltc_ltss_g_elpg_r(void) static inline u32 ltc_ltcs_ltss_g_elpg_r(void)
{ {
return 0x0017e828; return 0x0017e828;
} }
static inline u32 ltc_ltss_g_elpg_flush_v(u32 r) static inline u32 ltc_ltcs_ltss_g_elpg_flush_v(u32 r)
{ {
return (r >> 0) & 0x1; return (r >> 0) & 0x1;
} }
static inline u32 ltc_ltss_g_elpg_flush_pending_v(void) static inline u32 ltc_ltcs_ltss_g_elpg_flush_pending_v(void)
{ {
return 0x00000001; return 0x00000001;
} }
static inline u32 ltc_ltss_g_elpg_flush_pending_f(void) static inline u32 ltc_ltcs_ltss_g_elpg_flush_pending_f(void)
{
return 0x1;
}
static inline u32 ltc_ltc0_ltss_g_elpg_r(void)
{
return 0x00140828;
}
static inline u32 ltc_ltc0_ltss_g_elpg_flush_v(u32 r)
{
return (r >> 0) & 0x1;
}
static inline u32 ltc_ltc0_ltss_g_elpg_flush_pending_v(void)
{
return 0x00000001;
}
static inline u32 ltc_ltc0_ltss_g_elpg_flush_pending_f(void)
{ {
return 0x1; return 0x1;
} }

10
drivers/gpu/nvgpu/gk20a/ltc_common.c
View File

@@ -222,13 +222,13 @@ static void gk20a_mm_g_elpg_flush_locked(struct gk20a *g)
/* Make sure all previous writes are committed to the L2. There's no /* Make sure all previous writes are committed to the L2. There's no
guarantee that writes are to DRAM. This will be a sysmembar internal guarantee that writes are to DRAM. This will be a sysmembar internal
to the L2. */ to the L2. */
gk20a_writel(g, ltc_ltss_g_elpg_r(), gk20a_writel(g, ltc_ltcs_ltss_g_elpg_r(),
ltc_ltss_g_elpg_flush_pending_f()); ltc_ltcs_ltss_g_elpg_flush_pending_f());
do { do {
data = gk20a_readl(g, ltc_ltss_g_elpg_r()); data = gk20a_readl(g, ltc_ltc0_ltss_g_elpg_r());
if (ltc_ltss_g_elpg_flush_v(data) == if (ltc_ltc0_ltss_g_elpg_flush_v(data) ==
ltc_ltss_g_elpg_flush_pending_v()) { ltc_ltc0_ltss_g_elpg_flush_pending_v()) {
gk20a_dbg_info("g_elpg_flush 0x%x", data); gk20a_dbg_info("g_elpg_flush 0x%x", data);
retry--; retry--;
usleep_range(20, 40); usleep_range(20, 40);

8
drivers/gpu/nvgpu/gk20a/ltc_gk20a.c
View File

@@ -184,6 +184,13 @@ static void gk20a_ltc_sync_debugfs(struct gk20a *g)
} }
#endif #endif
static void gk20a_ltc_init_fs_state(struct gk20a *g)
{
gk20a_dbg_info("initialize gk20a L2");
g->max_ltc_count = g->ltc_count = 1;
}
void gk20a_init_ltc(struct gpu_ops *gops) void gk20a_init_ltc(struct gpu_ops *gops)
{ {
gops->ltc.determine_L2_size_bytes = gk20a_determine_L2_size_bytes; gops->ltc.determine_L2_size_bytes = gk20a_determine_L2_size_bytes;
@@ -200,4 +207,5 @@ void gk20a_init_ltc(struct gpu_ops *gops)
gops->ltc.sync_debugfs = gk20a_ltc_sync_debugfs; gops->ltc.sync_debugfs = gk20a_ltc_sync_debugfs;
#endif #endif
gops->ltc.elpg_flush = gk20a_mm_g_elpg_flush_locked; gops->ltc.elpg_flush = gk20a_mm_g_elpg_flush_locked;
gops->ltc.init_fs_state = gk20a_ltc_init_fs_state;
} }