diff --git a/drivers/gpu/nvgpu/common/gr/gr_utils.c b/drivers/gpu/nvgpu/common/gr/gr_utils.c
index 62dc8dc48..948d721ce 100644
--- a/drivers/gpu/nvgpu/common/gr/gr_utils.c
+++ b/drivers/gpu/nvgpu/common/gr/gr_utils.c
@@ -33,22 +33,12 @@ struct nvgpu_gr_falcon *nvgpu_gr_get_falcon_ptr(struct gk20a *g)
 	return g->gr->falcon;
 }
 
-void nvgpu_gr_reset_falcon_ptr(struct gk20a *g)
-{
-	g->gr->falcon = NULL;
-}
-
 struct nvgpu_gr_obj_ctx_golden_image *nvgpu_gr_get_golden_image_ptr(
 							struct gk20a *g)
 {
 	return g->gr->golden_image;
 }
 
-void nvgpu_gr_reset_golden_image_ptr(struct gk20a *g)
-{
-	g->gr->golden_image = NULL;
-}
-
 #ifdef CONFIG_NVGPU_GRAPHICS
 struct nvgpu_gr_zcull *nvgpu_gr_get_zcull_ptr(struct gk20a *g)
 {
@@ -66,13 +56,6 @@ struct nvgpu_gr_config *nvgpu_gr_get_config_ptr(struct gk20a *g)
 	return g->gr->config;
 }
 
-#ifdef CONFIG_NVGPU_DEBUGGER
-struct nvgpu_gr_hwpm_map *nvgpu_gr_get_hwpm_map_ptr(struct gk20a *g)
-{
-	return g->gr->hwpm_map;
-}
-#endif
-
 struct nvgpu_gr_intr *nvgpu_gr_get_intr_ptr(struct gk20a *g)
 {
 	return g->gr->intr;
@@ -106,3 +89,20 @@ void nvgpu_gr_clear_cilp_preempt_pending_chid(struct gk20a *g)
 	g->gr->cilp_preempt_pending_chid =
 				NVGPU_INVALID_CHANNEL_ID;
 }
+
+#ifdef CONFIG_NVGPU_DEBUGGER
+struct nvgpu_gr_hwpm_map *nvgpu_gr_get_hwpm_map_ptr(struct gk20a *g)
+{
+	return g->gr->hwpm_map;
+}
+
+void nvgpu_gr_reset_falcon_ptr(struct gk20a *g)
+{
+	g->gr->falcon = NULL;
+}
+
+void nvgpu_gr_reset_golden_image_ptr(struct gk20a *g)
+{
+	g->gr->golden_image = NULL;
+}
+#endif
diff --git a/drivers/gpu/nvgpu/include/nvgpu/gr/gr_utils.h b/drivers/gpu/nvgpu/include/nvgpu/gr/gr_utils.h
index e5cc2c3f3..a04ff2944 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/gr/gr_utils.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/gr/gr_utils.h
@@ -47,23 +47,22 @@ static inline u32 nvgpu_gr_checksum_u32(u32 a, u32 b)
 struct nvgpu_gr_falcon *nvgpu_gr_get_falcon_ptr(struct gk20a *g);
 struct nvgpu_gr_obj_ctx_golden_image *nvgpu_gr_get_golden_image_ptr(
 							struct gk20a *g);
+struct nvgpu_gr_config *nvgpu_gr_get_config_ptr(struct gk20a *g);
+struct nvgpu_gr_intr *nvgpu_gr_get_intr_ptr(struct gk20a *g);
 #ifdef CONFIG_NVGPU_GRAPHICS
 struct nvgpu_gr_zcull *nvgpu_gr_get_zcull_ptr(struct gk20a *g);
 struct nvgpu_gr_zbc *nvgpu_gr_get_zbc_ptr(struct gk20a *g);
 #endif
-struct nvgpu_gr_config *nvgpu_gr_get_config_ptr(struct gk20a *g);
 #ifdef CONFIG_NVGPU_DEBUGGER
 struct nvgpu_gr_hwpm_map *nvgpu_gr_get_hwpm_map_ptr(struct gk20a *g);
+void nvgpu_gr_reset_falcon_ptr(struct gk20a *g);
+void nvgpu_gr_reset_golden_image_ptr(struct gk20a *g);
 #endif
-struct nvgpu_gr_intr *nvgpu_gr_get_intr_ptr(struct gk20a *g);
 #ifdef CONFIG_NVGPU_FECS_TRACE
 struct nvgpu_gr_global_ctx_buffer_desc *nvgpu_gr_get_global_ctx_buffer_ptr(
 							struct gk20a *g);
 #endif
 
-void nvgpu_gr_reset_falcon_ptr(struct gk20a *g);
-void nvgpu_gr_reset_golden_image_ptr(struct gk20a *g);
-
 /* gr variables */
 u32 nvgpu_gr_get_override_ecc_val(struct gk20a *g);
 void nvgpu_gr_override_ecc_val(struct gk20a *g, u32 ecc_val);