diff --git a/drivers/gpu/nvgpu/common/ptimer/ptimer_gk20a.c b/drivers/gpu/nvgpu/common/ptimer/ptimer_gk20a.c
index f1e3818f6..eb93c3924 100644
--- a/drivers/gpu/nvgpu/common/ptimer/ptimer_gk20a.c
+++ b/drivers/gpu/nvgpu/common/ptimer/ptimer_gk20a.c
@@ -69,8 +69,8 @@ void gk20a_ptimer_isr(struct gk20a *g)
 		error_addr = 0U;
 	}
 
-	if (g->ops.ptimer.err_ops.report_timeout_err != NULL) {
-		ret = g->ops.ptimer.err_ops.report_timeout_err(g,
+	if (g->ops.priv_ring.err_ops.report_timeout_err != NULL) {
+		ret = g->ops.priv_ring.err_ops.report_timeout_err(g,
 				NVGPU_ERR_MODULE_PRI,
 				inst,
 				GPU_PRI_TIMEOUT_ERROR,
diff --git a/drivers/gpu/nvgpu/hal/priv_ring/priv_ring_gp10b.c b/drivers/gpu/nvgpu/hal/priv_ring/priv_ring_gp10b.c
index 282b59aa1..1886ddba7 100644
--- a/drivers/gpu/nvgpu/hal/priv_ring/priv_ring_gp10b.c
+++ b/drivers/gpu/nvgpu/hal/priv_ring/priv_ring_gp10b.c
@@ -68,6 +68,20 @@ void gp10b_priv_ring_decode_error_code(struct gk20a *g,
 			u32 error_code)
 {
 	u32 error_type_index;
+	int ret = 0;
+
+	if (g->ops.priv_ring.err_ops.report_access_violation != NULL) {
+		ret = g->ops.priv_ring.err_ops.report_access_violation (g,
+				NVGPU_ERR_MODULE_PRI,
+				0U,
+				GPU_PRI_ACCESS_VIOLATION,
+				0U,
+				error_code);
+		if (ret != 0) {
+			nvgpu_err(g, "Failed to report PRI access violation: "
+					"err_code=%u", error_code);
+		}
+	}
 
 	error_type_index = (error_code & 0x00000f00U) >> 8U;
 	error_code = error_code & 0xBADFf000U;
diff --git a/drivers/gpu/nvgpu/include/nvgpu/gk20a.h b/drivers/gpu/nvgpu/include/nvgpu/gk20a.h
index 5eadbb423..c0af5227c 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/gk20a.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/gk20a.h
@@ -1602,11 +1602,6 @@ struct gpu_ops {
 		int (*get_timestamps_zipper)(struct gk20a *g,
 			u32 source_id, u32 count,
 			struct nvgpu_cpu_time_correlation_sample *samples);
-		struct {
-			int (*report_timeout_err)(struct gk20a *g,
-					u32 hw_id, u32 inst, u32 err_id,
-					u32 err_addr, u32 error_code);
-		} err_ops;
 	} ptimer;
 
 	struct {
@@ -1692,6 +1687,14 @@ struct gpu_ops {
 		u32 (*enum_ltc)(struct gk20a *g);
 		u32 (*get_gpc_count)(struct gk20a *g);
 		u32 (*get_fbp_count)(struct gk20a *g);
+		struct {
+			int (*report_access_violation)(struct gk20a *g,
+					u32 hw_id, u32 inst, u32 err_id,
+					u32 err_addr, u32 error_code);
+			int (*report_timeout_err)(struct gk20a *g,
+					u32 hw_id, u32 inst, u32 err_id,
+					u32 err_addr, u32 error_code);
+		} err_ops;
 	} priv_ring;
 	struct {
 		int (*check_priv_security)(struct gk20a *g);
diff --git a/drivers/gpu/nvgpu/include/nvgpu/nvgpu_err.h b/drivers/gpu/nvgpu/include/nvgpu/nvgpu_err.h
index 6591f2f54..735334c72 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/nvgpu_err.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/nvgpu_err.h
@@ -161,7 +161,8 @@ struct gr_exception_info {
 #define GPU_HUBMMU_PDE0_DATA_ECC_CORRECTED		6U
 #define GPU_HUBMMU_PDE0_DATA_ECC_UNCORRECTED		7U
 
-#define GPU_PRI_TIMEOUT_ERROR	0U
+#define GPU_PRI_TIMEOUT_ERROR		0U
+#define GPU_PRI_ACCESS_VIOLATION	1U
 
 #define GPU_CE_LAUNCH_ERROR			0U
 #define GPU_CE_BLOCK_PIPE			1U