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gpu: nvgpu: add common.gr.setup api to free subctx

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Add new API nvgpu_gr_setup_free_subctx() in common.gr.ctx to free subctx
Call this via hal g->ops.gr.setup.free_subctx()

Subctx allocations happens through gr.setup api right now hence it makes
sense to provide subctx free api through same unit

Remove g->ops.channel.free_ctx_header() hal since we now have gr.setup
hal

Remove gv11b/subctx_gv11b.* files since they are no longer needed and
all the code in them has been moved to common units

Jira NVGPU-1886

Change-Id: I3d58fc3665ed9b6ffba830249a4cd30af7b857f4
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2094994
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Deepak Nibade
2019-04-04 19:33:13 +05:30
committed by mobile promotions
parent 1eb8abe0de
commit 4ba9592877
18 changed files with 21 additions and 100 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
drivers/gpu/nvgpu/Makefile
View File

@@ -554,7 +554,6 @@ nvgpu-y += \
gv11b/fifo_gv11b.o \
gv11b/mm_gv11b.o \
gv11b/ce_gv11b.o \
gv11b/subctx_gv11b.o \
gv100/mm_gv100.o \
gv100/bios_gv100.o \
gv100/fifo_gv100.o \

1
drivers/gpu/nvgpu/Makefile.sources
View File

@@ -262,7 +262,6 @@ srcs += common/sim.c \
gv11b/fifo_gv11b.c \
gv11b/mm_gv11b.c \
gv11b/ce_gv11b.c \
gv11b/subctx_gv11b.c \
gp106/gr_gp106.c \
gp106/bios_gp106.c \
gp106/clk_gp106.c \

4
drivers/gpu/nvgpu/common/fifo/channel.c
View File

@@ -411,8 +411,8 @@ static void gk20a_free_channel(struct channel_gk20a *ch, bool force)
g->ops.gr.fecs_trace.unbind_channel(g, &ch->inst_block);
#endif
if (g->ops.channel.free_ctx_header != NULL) {
g->ops.channel.free_ctx_header(ch);
if (g->ops.gr.setup.free_subctx != NULL) {
g->ops.gr.setup.free_subctx(ch);
ch->subctx = NULL;
}

8
drivers/gpu/nvgpu/common/fifo/channel_gv11b.c
View File

@@ -26,7 +26,6 @@
#include <nvgpu/atomic.h>
#include <nvgpu/io.h>
#include <nvgpu/gk20a.h>
#include <nvgpu/gr/subctx.h>
#include "channel_gk20a.h"
#include "channel_gv11b.h"
@@ -82,13 +81,6 @@ void gv11b_channel_reset_faulted(struct gk20a *g, struct channel_gk20a *ch,
gk20a_writel(g, ccsr_channel_r(ch->chid), reg);
}
void gv11b_channel_free_subctx_header(struct channel_gk20a *ch)
{
if (ch->subctx != NULL) {
nvgpu_gr_subctx_free(ch->g, ch->subctx, ch->vm);
}
}
void gv11b_channel_debug_dump(struct gk20a *g,
struct gk20a_debug_output *o,
struct nvgpu_channel_dump_info *info)

13
drivers/gpu/nvgpu/common/gr/gr_setup.c
View File

@@ -189,6 +189,19 @@ void nvgpu_gr_setup_free_gr_ctx(struct gk20a *g,
}
}
void nvgpu_gr_setup_free_subctx(struct channel_gk20a *c)
{
nvgpu_log_fn(c->g, " ");
if (!nvgpu_is_enabled(c->g, NVGPU_SUPPORT_TSG_SUBCONTEXTS)) {
return;
}
if (c->subctx != NULL) {
nvgpu_gr_subctx_free(c->g, c->subctx, c->vm);
}
}
int nvgpu_gr_setup_set_preemption_mode(struct channel_gk20a *ch,
u32 graphics_preempt_mode,
u32 compute_preempt_mode)

2
drivers/gpu/nvgpu/common/vgpu/gv11b/vgpu_hal_gv11b.c
View File

@@ -310,6 +310,7 @@ static const struct gpu_ops vgpu_gv11b_ops = {
.bind_ctxsw_zcull = vgpu_gr_bind_ctxsw_zcull,
.alloc_obj_ctx = vgpu_gr_alloc_obj_ctx,
.free_gr_ctx = vgpu_gr_free_gr_ctx,
.free_subctx = vgpu_channel_free_ctx_header,
.set_preemption_mode = vgpu_gr_set_preemption_mode,
},
.zbc = {
@@ -618,7 +619,6 @@ static const struct gpu_ops vgpu_gv11b_ops = {
.enable = vgpu_channel_enable,
.disable = vgpu_channel_disable,
.count = vgpu_channel_count,
.free_ctx_header = vgpu_channel_free_ctx_header,
.abort_clean_up = nvgpu_channel_abort_clean_up,
.suspend_all_serviceable_ch =
nvgpu_channel_suspend_all_serviceable_ch,

1
drivers/gpu/nvgpu/gv100/gr_gv100.c
View File

@@ -34,7 +34,6 @@
#include "gk20a/gr_pri_gk20a.h"
#include "gv100/gr_gv100.h"
#include "gv11b/subctx_gv11b.h"
#include <nvgpu/hw/gv100/hw_gr_gv100.h>
#include <nvgpu/hw/gv100/hw_proj_gv100.h>

3
drivers/gpu/nvgpu/gv100/hal_gv100.c
View File

@@ -149,7 +149,6 @@
#include "gv11b/ce_gv11b.h"
#include "gv11b/mm_gv11b.h"
#include "gv11b/fifo_gv11b.h"
#include "gv11b/subctx_gv11b.h"
#include "hal_gv100.h"
#include "gv100/bios_gv100.h"
@@ -587,6 +586,7 @@ static const struct gpu_ops gv100_ops = {
.bind_ctxsw_zcull = nvgpu_gr_setup_bind_ctxsw_zcull,
.alloc_obj_ctx = nvgpu_gr_setup_alloc_obj_ctx,
.free_gr_ctx = nvgpu_gr_setup_free_gr_ctx,
.free_subctx = nvgpu_gr_setup_free_subctx,
.set_preemption_mode = nvgpu_gr_setup_set_preemption_mode,
},
.zbc = {
@@ -1041,7 +1041,6 @@ static const struct gpu_ops gv100_ops = {
.count = gv100_channel_count,
.read_state = gv11b_channel_read_state,
.force_ctx_reload = gm20b_channel_force_ctx_reload,
.free_ctx_header = gv11b_channel_free_subctx_header,
.abort_clean_up = nvgpu_channel_abort_clean_up,
.suspend_all_serviceable_ch =
nvgpu_channel_suspend_all_serviceable_ch,

1
drivers/gpu/nvgpu/gv11b/fifo_gv11b.c
View File

@@ -63,7 +63,6 @@
#include <nvgpu/hw/gv11b/hw_gr_gv11b.h>
#include "fifo_gv11b.h"
#include "subctx_gv11b.h"
#include "gr_gv11b.h"
u64 gv11b_fifo_usermode_base(struct gk20a *g)

1
drivers/gpu/nvgpu/gv11b/gr_gv11b.c
View File

@@ -58,7 +58,6 @@
#include "gv11b/gr_gv11b.h"
#include "gv11b/mm_gv11b.h"
#include "gv11b/subctx_gv11b.h"
#include "gv11b/gr_pri_gv11b.h"
#include <nvgpu/hw/gv11b/hw_gr_gv11b.h>

3
drivers/gpu/nvgpu/gv11b/hal_gv11b.c
View File

@@ -139,7 +139,6 @@
#include "gv11b/ce_gv11b.h"
#include "gv11b/mm_gv11b.h"
#include "gv11b/fifo_gv11b.h"
#include "gv11b/subctx_gv11b.h"
#include <nvgpu/ptimer.h>
#include <nvgpu/debug.h>
@@ -563,6 +562,7 @@ static const struct gpu_ops gv11b_ops = {
.bind_ctxsw_zcull = nvgpu_gr_setup_bind_ctxsw_zcull,
.alloc_obj_ctx = nvgpu_gr_setup_alloc_obj_ctx,
.free_gr_ctx = nvgpu_gr_setup_free_gr_ctx,
.free_subctx = nvgpu_gr_setup_free_subctx,
.set_preemption_mode = nvgpu_gr_setup_set_preemption_mode,
},
.zbc = {
@@ -1014,7 +1014,6 @@ static const struct gpu_ops gv11b_ops = {
.count = gv11b_channel_count,
.read_state = gv11b_channel_read_state,
.force_ctx_reload = gm20b_channel_force_ctx_reload,
.free_ctx_header = gv11b_channel_free_subctx_header,
.abort_clean_up = nvgpu_channel_abort_clean_up,
.suspend_all_serviceable_ch =
nvgpu_channel_suspend_all_serviceable_ch,

1
drivers/gpu/nvgpu/gv11b/mm_gv11b.c
View File

@@ -34,7 +34,6 @@
#include "gp10b/mm_gp10b.h"
#include "mm_gv11b.h"
#include "subctx_gv11b.h"
#include <nvgpu/hw/gv11b/hw_gmmu_gv11b.h>

45
drivers/gpu/nvgpu/gv11b/subctx_gv11b.c
View File

@@ -1,45 +0,0 @@
/*
* Volta GPU series Subcontext
*
* Copyright (c) 2016-2019, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#include <nvgpu/gk20a.h>
#include <nvgpu/dma.h>
#include <nvgpu/log.h>
#include <nvgpu/gmmu.h>
#include <nvgpu/utils.h>
#include <nvgpu/channel.h>
#include <nvgpu/gr/subctx.h>
#include <nvgpu/gr/ctx.h>
#include <nvgpu/hw/gv11b/hw_gr_gv11b.h>
#include "gv11b/subctx_gv11b.h"
void gv11b_free_subctx_header(struct channel_gk20a *c)
{
if (c->subctx != NULL) {
nvgpu_gr_subctx_free(c->g, c->subctx, c->vm);
}
}

30
drivers/gpu/nvgpu/gv11b/subctx_gv11b.h
View File

@@ -1,30 +0,0 @@
/*
*
* Volta GPU series Subcontext
*
* Copyright (c) 2016 - 2019, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#ifndef NVGPU_SUBCTX_GV11B_H
#define NVGPU_SUBCTX_GV11B_H
void gv11b_free_subctx_header(struct channel_gk20a *c);
#endif /* NVGPU_SUBCTX_GV11B_H */

1
drivers/gpu/nvgpu/hal/fifo/ramfc_gv11b.c
View File

@@ -33,7 +33,6 @@
#include "hal/fifo/ramfc_gv11b.h"
#include "gv11b/fifo_gv11b.h"
#include "gv11b/subctx_gv11b.h"
int gv11b_ramfc_setup(struct channel_gk20a *ch, u64 gpfifo_base,
u32 gpfifo_entries, u64 pbdma_acquire_timeout, u32 flags)

2
drivers/gpu/nvgpu/include/nvgpu/gk20a.h
View File

@@ -640,6 +640,7 @@ struct gpu_ops {
void (*free_gr_ctx)(struct gk20a *g,
struct vm_gk20a *vm,
struct nvgpu_gr_ctx *gr_ctx);
void (*free_subctx)(struct channel_gk20a *c);
int (*set_preemption_mode)(struct channel_gk20a *ch,
u32 graphics_preempt_mode,
u32 compute_preempt_mode);
@@ -1155,7 +1156,6 @@ struct gpu_ops {
void (*read_state)(struct gk20a *g, struct channel_gk20a *ch,
struct nvgpu_channel_hw_state *state);
void (*force_ctx_reload)(struct channel_gk20a *ch);
void (*free_ctx_header)(struct channel_gk20a *ch);
void (*abort_clean_up)(struct channel_gk20a *ch);
int (*suspend_all_serviceable_ch)(struct gk20a *g);
int (*resume_all_serviceable_ch)(struct gk20a *g);

1
drivers/gpu/nvgpu/include/nvgpu/gr/setup.h
View File

@@ -36,6 +36,7 @@ int nvgpu_gr_setup_alloc_obj_ctx(struct channel_gk20a *c, u32 class_num,
u32 flags);
void nvgpu_gr_setup_free_gr_ctx(struct gk20a *g,
struct vm_gk20a *vm, struct nvgpu_gr_ctx *gr_ctx);
void nvgpu_gr_setup_free_subctx(struct channel_gk20a *c);
int nvgpu_gr_setup_set_preemption_mode(struct channel_gk20a *ch,
u32 graphics_preempt_mode,

3
drivers/gpu/nvgpu/tu104/hal_tu104.c
View File

@@ -163,7 +163,6 @@
#include "gv11b/ce_gv11b.h"
#include "gv11b/mm_gv11b.h"
#include "gv11b/fifo_gv11b.h"
#include "gv11b/subctx_gv11b.h"
#include "gv100/bios_gv100.h"
#include "gv100/fifo_gv100.h"
@@ -616,6 +615,7 @@ static const struct gpu_ops tu104_ops = {
.bind_ctxsw_zcull = nvgpu_gr_setup_bind_ctxsw_zcull,
.alloc_obj_ctx = nvgpu_gr_setup_alloc_obj_ctx,
.free_gr_ctx = nvgpu_gr_setup_free_gr_ctx,
.free_subctx = nvgpu_gr_setup_free_subctx,
.set_preemption_mode = nvgpu_gr_setup_set_preemption_mode,
},
.zbc = {
@@ -1079,7 +1079,6 @@ static const struct gpu_ops tu104_ops = {
.count = gv100_channel_count,
.read_state = gv11b_channel_read_state,
.force_ctx_reload = gm20b_channel_force_ctx_reload,
.free_ctx_header = gv11b_channel_free_subctx_header,
.abort_clean_up = nvgpu_channel_abort_clean_up,
.suspend_all_serviceable_ch =
nvgpu_channel_suspend_all_serviceable_ch,