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gpu: nvgpu: APIs to suspend/resume single SM
Add below APIs to suspend or resume single SM : gk20a_suspend_single_sm() gk20a_resume_single_sm() Also, update gk20a_suspend_all_sms() to make it more generic by passing global_esr_mask and check_errors flag as parameter Bug 200156699 Change-Id: If40f4bcae74a8132673b4dca10b7d9898f23c164 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/925884 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
This commit is contained in:
committed by
Sachin Nikam
parent
ca76b336b3
commit
4bc0a42f32
@@ -7021,7 +7021,42 @@ int gk20a_gr_wait_for_sm_lock_down(struct gk20a *g, u32 gpc, u32 tpc,
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return -EAGAIN;
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}
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void gk20a_suspend_all_sms(struct gk20a *g)
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void gk20a_suspend_single_sm(struct gk20a *g,
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u32 gpc, u32 tpc,
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u32 global_esr_mask, bool check_errors)
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{
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u32 offset;
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int err;
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u32 dbgr_control0;
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offset = proj_gpc_stride_v() * gpc +
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proj_tpc_in_gpc_stride_v() * tpc;
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/* if an SM debugger isn't attached, skip suspend */
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if (!gk20a_gr_sm_debugger_attached(g)) {
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gk20a_err(dev_from_gk20a(g),
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"SM debugger not attached, skipping suspend!\n");
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return;
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}
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/* assert stop trigger. */
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dbgr_control0 = gk20a_readl(g,
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gr_gpc0_tpc0_sm_dbgr_control0_r() + offset);
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dbgr_control0 |= gr_gpcs_tpcs_sm_dbgr_control0_stop_trigger_enable_f();
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gk20a_writel(g, gr_gpc0_tpc0_sm_dbgr_control0_r() + offset,
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dbgr_control0);
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err = gk20a_gr_wait_for_sm_lock_down(g, gpc, tpc,
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global_esr_mask, check_errors);
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if (err) {
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gk20a_err(dev_from_gk20a(g),
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"SuspendSm failed\n");
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return;
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}
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}
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void gk20a_suspend_all_sms(struct gk20a *g,
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u32 global_esr_mask, bool check_errors)
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{
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struct gr_gk20a *gr = &g->gr;
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u32 gpc, tpc;
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@@ -7030,8 +7065,8 @@ void gk20a_suspend_all_sms(struct gk20a *g)
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/* if an SM debugger isn't attached, skip suspend */
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if (!gk20a_gr_sm_debugger_attached(g)) {
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gk20a_err(dev_from_gk20a(g), "SM debugger not attached, "
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"skipping suspend!\n");
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gk20a_err(dev_from_gk20a(g),
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"SM debugger not attached, skipping suspend!\n");
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return;
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}
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@@ -7048,7 +7083,8 @@ void gk20a_suspend_all_sms(struct gk20a *g)
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for (gpc = 0; gpc < gr->gpc_count; gpc++) {
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for (tpc = 0; tpc < gr->tpc_count; tpc++) {
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err =
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gk20a_gr_wait_for_sm_lock_down(g, gpc, tpc, 0, false);
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gk20a_gr_wait_for_sm_lock_down(g, gpc, tpc,
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global_esr_mask, check_errors);
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if (err) {
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gk20a_err(dev_from_gk20a(g),
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"SuspendAllSms failed\n");
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@@ -7058,6 +7094,42 @@ void gk20a_suspend_all_sms(struct gk20a *g)
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}
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}
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void gk20a_resume_single_sm(struct gk20a *g,
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u32 gpc, u32 tpc)
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{
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u32 dbgr_control0;
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u32 offset;
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/*
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* The following requires some clarification. Despite the fact that both
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* RUN_TRIGGER and STOP_TRIGGER have the word "TRIGGER" in their
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* names, only one is actually a trigger, and that is the STOP_TRIGGER.
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* Merely writing a 1(_TASK) to the RUN_TRIGGER is not sufficient to
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* resume the gpu - the _STOP_TRIGGER must explicitly be set to 0
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* (_DISABLE) as well.
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* Advice from the arch group: Disable the stop trigger first, as a
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* separate operation, in order to ensure that the trigger has taken
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* effect, before enabling the run trigger.
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*/
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offset = proj_gpc_stride_v() * gpc +
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proj_tpc_in_gpc_stride_v() * tpc;
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/*De-assert stop trigger */
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dbgr_control0 =
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gk20a_readl(g, gr_gpc0_tpc0_sm_dbgr_control0_r() + offset);
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dbgr_control0 = set_field(dbgr_control0,
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gr_gpcs_tpcs_sm_dbgr_control0_stop_trigger_m(),
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gr_gpcs_tpcs_sm_dbgr_control0_stop_trigger_disable_f());
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gk20a_writel(g,
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gr_gpcs_tpcs_sm_dbgr_control0_r() + offset, dbgr_control0);
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/* Run trigger */
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dbgr_control0 |= gr_gpcs_tpcs_sm_dbgr_control0_run_trigger_task_f();
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gk20a_writel(g,
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gr_gpc0_tpc0_sm_dbgr_control0_r() + offset, dbgr_control0);
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}
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void gk20a_resume_all_sms(struct gk20a *g)
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{
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u32 dbgr_control0;
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