From 4c0412ad18ef2c7edfe0f994ad78867b64e4affa Mon Sep 17 00:00:00 2001 From: Abdul Salam Date: Mon, 8 Jul 2019 14:44:05 +0530 Subject: [PATCH] gpu: nvgpu: Return Nominal clocks when PSTATE is Disabled When NVGPU_PMU_PSTATE is disabled, dGPU will boot with Initialization state --> nominal clocks from VBIOS. Use this values in clk_maxrate when PSTATE is disabled. Bug 200533299 Change-Id: I0861495999803f5876c5865f33c494ee8de6d2e0 Signed-off-by: Abdul Salam Reviewed-on: https://git-master.nvidia.com/r/2149444 Reviewed-by: svc-mobile-coverity Reviewed-by: svc-mobile-misra GVS: Gerrit_Virtual_Submit Reviewed-by: Mahantesh Kumbar Reviewed-by: Vijayakumar Subbu Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/hal/clk/clk_gv100.c | 19 +++++++++++++------ drivers/gpu/nvgpu/include/nvgpu/clk_arb.h | 4 ++-- 2 files changed, 15 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/nvgpu/hal/clk/clk_gv100.c b/drivers/gpu/nvgpu/hal/clk/clk_gv100.c index 3368c8804..d58d72f1d 100644 --- a/drivers/gpu/nvgpu/hal/clk/clk_gv100.c +++ b/drivers/gpu/nvgpu/hal/clk/clk_gv100.c @@ -56,6 +56,7 @@ #define XTAL_SCALE_TO_KHZ 1 #define NUM_NAMEMAPS (3U) #define XTAL4X_KHZ 108000 +#define BOOT_GPCCLK_MHZ 645U u32 gv100_crystal_clk_hz(struct gk20a *g) { @@ -238,14 +239,20 @@ void gv100_suspend_clk_support(struct gk20a *g) unsigned long gv100_clk_maxrate(struct gk20a *g, u32 api_domain) { - u16 min_mhz, max_mhz; + u16 min_mhz = 0, max_mhz = 0; int status; - status = nvgpu_clk_arb_get_arbiter_clk_range(g, api_domain, &min_mhz, - &max_mhz); - if (status != 0) { - nvgpu_err(g, "failed to fetch clock range"); - return 0U; + if (nvgpu_is_enabled(g, NVGPU_PMU_PSTATE)) { + status = nvgpu_clk_arb_get_arbiter_clk_range(g, api_domain, + &min_mhz, &max_mhz); + if (status != 0) { + nvgpu_err(g, "failed to fetch clock range"); + return 0U; + } + } else { + if (api_domain == NVGPU_CLK_DOMAIN_GPCCLK) { + max_mhz = BOOT_GPCCLK_MHZ; + } } return (max_mhz * 1000UL * 1000UL); diff --git a/drivers/gpu/nvgpu/include/nvgpu/clk_arb.h b/drivers/gpu/nvgpu/include/nvgpu/clk_arb.h index d0485c16a..87c1ad77b 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/clk_arb.h +++ b/drivers/gpu/nvgpu/include/nvgpu/clk_arb.h @@ -107,9 +107,9 @@ struct nvgpu_clk_session; * defines in uapi header */ /* Memory clock */ -#define NVGPU_CLK_DOMAIN_MCLK (0) +#define NVGPU_CLK_DOMAIN_MCLK 0U /* Main graphics core clock */ -#define NVGPU_CLK_DOMAIN_GPCCLK (1) +#define NVGPU_CLK_DOMAIN_GPCCLK 1U #define NVGPU_CLK_DOMAIN_MAX (NVGPU_CLK_DOMAIN_GPCCLK)