From 4c1489c2c4843bf1c433c97fcbf72cc410711529 Mon Sep 17 00:00:00 2001 From: rmylavarapu Date: Mon, 15 Jul 2019 10:11:01 +0530 Subject: [PATCH] gpu: nvgpu: Update Macros of PERF RPCs Updated PERF RPC function id macros with the latest safety ucode. NVGPU-3810 Change-Id: I9bee2ddaccf255159f281822e197064b33082839 Signed-off-by: rmylavarapu Reviewed-on: https://git-master.nvidia.com/r/2153121 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Mahantesh Kumbar Tested-by: Mahantesh Kumbar Reviewed-by: Vijayakumar Subbu Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/include/nvgpu/pmu/pmuif/perf.h | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/nvgpu/include/nvgpu/pmu/pmuif/perf.h b/drivers/gpu/nvgpu/include/nvgpu/pmu/pmuif/perf.h index 2f7a6bf68..fa189d7d0 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/pmu/pmuif/perf.h +++ b/drivers/gpu/nvgpu/include/nvgpu/pmu/pmuif/perf.h @@ -51,11 +51,12 @@ #define NV_PMU_RPC_ID_PERF_CHANGE_SEQ_LOCK 0x06U #define NV_PMU_RPC_ID_PERF_CHANGE_SEQ_QUERY 0x07U #define NV_PMU_RPC_ID_PERF_PERF_LIMITS_INVALIDATE 0x08U -#define NV_PMU_RPC_ID_PERF_VFE_EQU_EVAL 0x09U -#define NV_PMU_RPC_ID_PERF_VFE_INVALIDATE 0x0AU -#define NV_PMU_RPC_ID_PERF_VFE_EQU_MONITOR_SET 0x0BU -#define NV_PMU_RPC_ID_PERF_VFE_EQU_MONITOR_GET 0x0CU -#define NV_PMU_RPC_ID_PERF__COUNT 0x0DU +#define NV_PMU_RPC_ID_PERF_PERF_PSTATE_STATUS_UPDATE 0x09U +#define NV_PMU_RPC_ID_PERF_VFE_EQU_EVAL 0x0AU +#define NV_PMU_RPC_ID_PERF_VFE_INVALIDATE 0x0BU +#define NV_PMU_RPC_ID_PERF_VFE_EQU_MONITOR_SET 0x0CU +#define NV_PMU_RPC_ID_PERF_VFE_EQU_MONITOR_GET 0x0DU +#define NV_PMU_RPC_ID_PERF__COUNT 0x0EU /* * Defines the structure that holds data * used to execute LOAD RPC.