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gpu: nvgpu: Add poweron voltage to clock structure

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Added GPCPLL poweron voltage field to GPU clock structure. Initialized
it differently for GPCPLL revisions B1 and C1.

Bug 1924194

Change-Id: Ide7a08445afd3ab9aea21f75871b750f45c02c99
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/1481263
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Bo Yan <byan@nvidia.com>
This commit is contained in:
Alex Frid
2017-05-12 21:28:00 -07:00
committed by mobile promotions
parent 2c822a6388
commit 4d7711b076
2 changed files with 13 additions and 4 deletions
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1
drivers/gpu/nvgpu/gk20a/clk_gk20a.h
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@@ -96,6 +96,7 @@ struct clk_gk20a {
bool sw_ready;
bool clk_hw_on;
bool debugfs_set;
int pll_poweron_uv;
};
#if defined(CONFIG_COMMON_CLK)