gpu: nvgpu: create a wrapper over sync_fences

This patch constructs an abstraction to hide the sync_fence
functionality from the common code. struct nvgpu_os_fence acts as an
abstraction for struct sync_fence.

struct nvgpu_os_fence consists of an ops structure named nvgpu_os_fence_ops
which contains an API to do pushbuffer programming to generate wait
commands for the fence.

The current implementation of nvgpu only allows for wait method on a
sync_fence which was generated using a similar backend(i.e. either
Nvhost Syncpoints or Semaphores). In this patch, a
generic API is introduced which will decide the type of the underlying
implementation of the struct nvgpu_os_fence at runtime and run the
corresponding wait implementation on it.

This patch changes the channel_sync_gk20a's semaphore specific
implementation to use the abstract API. A subsequent patch will make
the changes for the nvhost_syncpoint based implementations as well.

JIRA NVGPU-66

Change-Id: If6675bfde5885c3d15d2ca380bb6c7c0e240e734
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1667218
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

drivers/gpu/nvgpu/common/linux/os_fence_android.c

@@ -0,0 +1,71 @@
+/*
+ * Copyright (c) 2018, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+#include <nvgpu/types.h>
+#include <nvgpu/os_fence.h>
+#include <nvgpu/linux/os_fence_android.h>
+
+#include "gk20a/gk20a.h"
+
+#include "../drivers/staging/android/sync.h"
+
+inline struct sync_fence *nvgpu_get_sync_fence(struct nvgpu_os_fence *s)
+{
+	struct sync_fence *fence = (struct sync_fence *)s->priv;
+	return fence;
+}
+
+static void nvgpu_os_fence_clear(struct nvgpu_os_fence *fence_out)
+{
+	fence_out->priv = NULL;
+	fence_out->g = NULL;
+	fence_out->ops = NULL;
+}
+
+void nvgpu_os_fence_init(struct nvgpu_os_fence *fence_out,
+	struct gk20a *g, const struct nvgpu_os_fence_ops *fops,
+	struct sync_fence *fence)
+{
+	fence_out->g = g;
+	fence_out->ops = fops;
+	fence_out->priv = (void *)fence;
+}
+
+void nvgpu_os_fence_android_drop_ref(struct nvgpu_os_fence *s)
+{
+	struct sync_fence *fence = nvgpu_get_sync_fence(s);
+
+	sync_fence_put(fence);
+
+	nvgpu_os_fence_clear(s);
+}
+
+int nvgpu_os_fence_fdget(struct nvgpu_os_fence *fence_out,
+	struct channel_gk20a *c, int fd)
+{
+	int err;
+
+	err = nvgpu_os_fence_sema_fdget(fence_out, c, fd);
+
+	/* TO-DO
+	 * check if fence is empty and if CONFIG_TEGRA_GK20A_NVHOST
+	 * is enabled, try to get a sync_fence using
+	 * corresponding nvhost method.
+	 */
+	if (err)
+		nvgpu_err(c->g, "error obtaining fence from fd %d", fd);
+
+	return err;
+}

drivers/gpu/nvgpu/common/linux/os_fence_android_sema.c

@@ -0,0 +1,107 @@
+/*
+ * Copyright (c) 2018, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <nvgpu/errno.h>
+
+#include <nvgpu/types.h>
+#include <nvgpu/os_fence.h>
+#include <nvgpu/linux/os_fence_android.h>
+#include <nvgpu/semaphore.h>
+
+#include "gk20a/sync_gk20a.h"
+#include "gk20a/channel_sync_gk20a.h"
+#include "gk20a/mm_gk20a.h"
+
+#include "../drivers/staging/android/sync.h"
+
+int nvgpu_os_fence_sema_wait_gen_cmd(struct nvgpu_os_fence *s,
+	struct priv_cmd_entry *wait_cmd,
+	struct channel_gk20a *c,
+	int max_wait_cmds)
+{
+	int err;
+	const int wait_cmd_size = 8;
+	int num_wait_cmds;
+	int i;
+	struct nvgpu_semaphore *sema;
+	struct sync_fence *sync_fence = nvgpu_get_sync_fence(s);
+
+	num_wait_cmds = sync_fence->num_fences;
+	if (num_wait_cmds == 0)
+		return 0;
+
+	if (max_wait_cmds && num_wait_cmds > max_wait_cmds)
+		return -EINVAL;
+
+	err = gk20a_channel_alloc_priv_cmdbuf(c,
+		wait_cmd_size * num_wait_cmds,
+		wait_cmd);
+	if (err) {
+		nvgpu_err(c->g, "not enough priv cmd buffer space");
+		return err;
+	}
+
+	for (i = 0; i < num_wait_cmds; i++) {
+		struct fence *f = sync_fence->cbs[i].sync_pt;
+		struct sync_pt *pt = sync_pt_from_fence(f);
+
+		sema = gk20a_sync_pt_sema(pt);
+		gk20a_channel_gen_sema_wait_cmd(c, sema, wait_cmd,
+			wait_cmd_size, i);
+	}
+
+	return 0;
+}
+
+static const struct nvgpu_os_fence_ops sema_ops = {
+	.program_waits = nvgpu_os_fence_sema_wait_gen_cmd,
+	.drop_ref = nvgpu_os_fence_android_drop_ref,
+};
+
+int nvgpu_os_fence_sema_create(
+	struct nvgpu_os_fence *fence_out,
+	struct channel_gk20a *c,
+	struct nvgpu_semaphore *sema)
+{
+	struct sync_fence *fence;
+
+	fence = gk20a_sync_fence_create(c, sema, "f-gk20a-0x%04x",
+			nvgpu_semaphore_gpu_ro_va(sema));
+
+	if (!fence) {
+		nvgpu_err(c->g, "error constructing new fence: f-gk20a-0x%04x",
+			(u32)nvgpu_semaphore_gpu_ro_va(sema));
+
+		return -ENOMEM;
+	}
+
+	nvgpu_os_fence_init(fence_out, c->g, &sema_ops, fence);
+
+	return 0;
+}
+
+int nvgpu_os_fence_sema_fdget(struct nvgpu_os_fence *fence_out,
+	struct channel_gk20a *c, int fd)
+{
+	struct sync_fence *fence = gk20a_sync_fence_fdget(fd);
+
+	if (!fence)
+		return -EINVAL;
+
+	nvgpu_os_fence_init(fence_out, c->g, &sema_ops, fence);
+
+	return 0;
+}