diff --git a/drivers/gpu/nvgpu/common/pmu/lsfm/lsfm_sw_gm20b.c b/drivers/gpu/nvgpu/common/pmu/lsfm/lsfm_sw_gm20b.c index 2446aaf8b..2c2e583ff 100644 --- a/drivers/gpu/nvgpu/common/pmu/lsfm/lsfm_sw_gm20b.c +++ b/drivers/gpu/nvgpu/common/pmu/lsfm/lsfm_sw_gm20b.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2015-2023, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -169,8 +169,7 @@ int gm20b_pmu_lsfm_pmu_cmd_line_args_copy(struct gk20a *g, pmu->fw->ops.get_cmd_line_args_size(pmu); /* Copying pmu cmdline args */ - pmu->fw->ops.set_cmd_line_args_cpu_freq(pmu, - (u32)g->ops.clk.get_rate(g, CTRL_CLK_DOMAIN_PWRCLK)); + pmu->fw->ops.set_cmd_line_args_cpu_freq(pmu, NVGPU_PWRCLK_RATE); pmu->fw->ops.set_cmd_line_args_secure_mode(pmu, 1U); pmu->fw->ops.set_cmd_line_args_trace_size( pmu, PMU_RTOS_TRACE_BUFSIZE); diff --git a/drivers/gpu/nvgpu/common/pmu/pmu_rtos_init.c b/drivers/gpu/nvgpu/common/pmu/pmu_rtos_init.c index 4142567b2..014ec31de 100644 --- a/drivers/gpu/nvgpu/common/pmu/pmu_rtos_init.c +++ b/drivers/gpu/nvgpu/common/pmu/pmu_rtos_init.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017-2022, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2017-2023, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -250,8 +250,7 @@ void nvgpu_pmu_rtos_cmdline_args_init(struct gk20a *g, struct nvgpu_pmu *pmu) pmu->fw->ops.set_cmd_line_args_trace_dma_idx( pmu, GK20A_PMU_DMAIDX_VIRT); - pmu->fw->ops.set_cmd_line_args_cpu_freq(pmu, - (u32)g->ops.clk.get_rate(g, CTRL_CLK_DOMAIN_PWRCLK)); + pmu->fw->ops.set_cmd_line_args_cpu_freq(pmu, NVGPU_PWRCLK_RATE); if (pmu->fw->ops.config_cmd_line_args_super_surface != NULL) { pmu->fw->ops.config_cmd_line_args_super_surface(pmu); diff --git a/drivers/gpu/nvgpu/include/nvgpu/pmu.h b/drivers/gpu/nvgpu/include/nvgpu/pmu.h index 4a72788f6..d3402b9b4 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/pmu.h +++ b/drivers/gpu/nvgpu/include/nvgpu/pmu.h @@ -214,6 +214,8 @@ struct nvgpu_clk_pmupstate; #define PMU_BAR0_READ_FECSERR 9U #define PMU_BAR0_WRITE_FECSERR 10U +#define NVGPU_PWRCLK_RATE 204000000UL + #ifdef CONFIG_NVGPU_LS_PMU struct rpc_handler_payload { void *rpc_buff;